The SYCO system is a silicon compiler for VLSI circuits specified by algorithms. The SYCO system starts from an algorithmic description and produces a microprocessor-like circuit that realizes the algorithm. It uses a target architecture based on a multiple interpretation level scheme. A large interpreter of a given command language is split into a set of interpreter levels. Each interpreter level breaks down the commands given by the upper level into a set of sub-commands for the lower level. Each interpreter level is implemented by a block of layout called a layout slice. A chip will contain one data path slice and several control section slices. The SYCO system makes use of a set of specialized compilers to produce the layout of the datapath and of the control section slices. These slices are generated to be automatically assembled together. The whole system is written in Le Lisp. It is expected that the SYCO system will give the ability to compile circuits, which have the complexity of the MC68000. The SYCO system is developed in the framework of the SYCOMORE French National Project for CAD of VLSI.