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Martin L. Resnick

dblp:02/2112 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1986
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
system-level design
0.011986
SPARTA: A System Partitioning Aid · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
Electronic design automation › system-level design
system partitioning
0.011986
SPARTA: A System Partitioning Aid · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
Electronic design automation
design space exploration
0.011986
SPARTA: A System Partitioning Aid · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
YearPublicationVenuePosition
1986 SPARTA: A System Partitioning Aid
abstract
This paper presents SPARTA, the System PARTitioning Aid. Partitioning is the design phase in which a system's functionality is divided into smaller parts that fit onto physical units. SPARTA is a unique and interesting approach to computer-aided partitioning of systems SPARTA performs the tedious calculation of each design factor (such as area) for each partition (such as chips). This allows the designer to evaluate many partitionings within a very short time with minimal effort. SPARTA does not generate partitionings, it evaluates the user's partitionings in a way similar to spreadsheet programs. SPARTA was designed as a testbed for future work on partitioning algorithms.
Martin L. Resnick
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1