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Amir Beygi

dblp:02/8973 · DBLP profile ↗
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3ranked-venue papers
1as first author
2since 2021 · last 2025
0009-0005-9621-4656ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author · 2 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 60% Performance modeling and evaluation · 20% Integrated circuit design · 20%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
circuit simulation
0.112010
Sensitivity Analysis of Lossy Multiconductor Transmission Lines Based on the Passive Method of Characteristics Macromodel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010
Electronic design automation › interconnect modeling
lossy interconnect
0.112010
Sensitivity Analysis of Lossy Multiconductor Transmission Lines Based on the Passive Method of Characteristics Macromodel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010
Integrated circuit design › interconnect
multiconductor transmission line
0.112010
Sensitivity Analysis of Lossy Multiconductor Transmission Lines Based on the Passive Method of Characteristics Macromodel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010
Performance modeling and evaluation › statistical analysis
sensitivity analysis
0.112010
Sensitivity Analysis of Lossy Multiconductor Transmission Lines Based on the Passive Method of Characteristics Macromodel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010
Electronic design automation
signal integrity
0.112010
Sensitivity Analysis of Lossy Multiconductor Transmission Lines Based on the Passive Method of Characteristics Macromodel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010

Methods — techniques the papers use, named apart from their topics

sensitivity analysis · 0.1passive method of characteristics · 0.1
YearPublicationVenuePosition
2025 Revisiting Memory Hierarchies with CMM-H: Use Device-side Caching to Integrate DRAM and SSD for a Hybrid CXL Memory
abstract
Emerging data-intensive applications increasingly demand large-scale, cost-effective, and high-performance memory solutions. Samsung's CXL Memory Module-Hybrid (CMM-H) uniquely integrates DDR DRAM and NAND flash storage within a single CXL-attached memory device for higher capacity while keeping still high performance. This paper provides a comprehensive exploration of the CMM-H module, detailing its architectural design, operational workflow, and caching mechanisms. We evaluate the performance of CMM-H through extensive experiments, highlighting its benefits and limitations. Our study contributes insights into hybrid CXL memory architectures and provides valuable guidance for future CXL memory design improvements.
Mohammadreza Soltaniyeh, Gongjin Sun, Xuebin Yao, Amir Beygi, Ramdas Kachare, Dongwan Zhao, Hingkwan Huen, Senthil Murugesapandian, Caroline Kahn
HotStorage4
2022 RPkNN: An OpenCL-Based FPGA Implementation of the Dimensionality-Reduced kNN Algorithm Using Random Projection
abstract
Due to the so-called curse of dimensionality and increase in the size of databases, there is an ever-increasing demand for computing resources and memory bandwidth when performing the k-nearest neighbors (kNNs) algorithm, resulting in a slow-down to process large datasets. This work presents an OpenCL-based framework for accelerating the kNN algorithm on field-programmable gate arrays (FPGAs) benefiting from the random projection dimensionality reduction. The proposed RPkNN framework includes two compute modules implementing a throughput-optimized hardware architecture based on random projection and the kNN algorithm and a host program facilitating easy integration of the compute modules in the existing applications. RPkNN also utilizes a new buffering scheme tailored to random projection and the kNN algorithm. The proposed architecture enables parallel kNN computations with a single memory channel and takes advantage of the sparsity features of the input data to implement a highly optimized and parallel implementation of random projection. We employ a computation storage device (CSD) to directly access the high-dimensional data on non-volatile memory express (NVMe) solid state drive (SSD) and store and reuse the compressed and low-dimensional data on the FPGA dynamic random access memory (DRAM), hence eliminating data transfers to the host DRAM. We compare RPkNN implemented on the Samsung SmartSSD CSD with the kNN implementation of the scikit-learn library running on an Intel Xeon Gold 6154 CPU. The experimental results show that the proposed RPkNN solution achieves, on average,$26\times $and$46\times $higher performance across different dimensions per a single kNN computation for the SIFT1M and GIST1M databases, respectively. Finally, RPkNN is$1.7\times $faster than the similar FPGA-based reference method.
Erfan Bank Tavakoli, Amir Beygi, Xuebin Yao
IEEE Trans. Very Large Scale Integr. Syst.2
2010 Sensitivity Analysis of Lossy Multiconductor Transmission Lines Based on the Passive Method of Characteristics Macromodel
abstract
This paper describes an efficient approach for time domain sensitivity analysis of lossy high speed interconnects in the presence of nonlinear terminations. The sensitivity information is derived using the recently developed passive method of characteristics. An important feature of the proposed method is that the sensitivities are obtained from the solution of the original network, leading to significant computational advantages. Numerical examples are presented to illustrate the validity of the proposed approach.
Amir Beygi, Anestis Dounavis
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1