Fail-safe synchronous sequential machines produce safeside outputs when failures occur within the machine. This correspondence presents a procedure to design such machines using a modification of the on-set equation form originally presented by Tohma et al. [1] and later improved by Diaz et al. [2]. A systematic procedure for state assignment and next-state equation derivation, using partition theory, is presented. From this method an easily calculated upper bound on the number of gates required-to realize a fail-safe circuit is derived.

The authors1have used a coding theory approach in an attempt to design fault-detecting and fault-tolerant asynchronous sequential machines. While the method appears to be sound from theoretical aspects, actual attempts to implement these design procedures reveal a serious shortcoming which should be made known.

Fail-safe circuits are designed to assume a 1 (1-fail-safe) or a 0 (0-fail-safe) output state upon failure. This correspondence extends fault detection techniques previously presented [1] to include the design of fail-safe asynchronous sequential circuits. Faults causing failures in the internal state logic and the output state logic circuitry are treated. These failures are assumed to be symmetric and the resulting circuit realizations require less hardware than realizations derived from previously presented techniques.

A general design technique for achieving single fault-tolerant asynchronous sequential circuits is described. The design procedures apply over a large range of fault conditions and are extremely easy to use. Generally, less than three times the logic required for a single copy is needed to achieve single fault tolerance. In addition to fault tolerance, real time fault detection is easily achieved and it is immediately known when single fault tolerant capability is exceeded.

Tan recently developed a heuristic state assignment algorithm for asynchronous sequential circuits. This note extends Tan's procedure to include optimization of the output state logic, as well as the next state logic, and single-output-change (SOC) flow tables with DON'T CARE entries. The extended algorithm exhibits the same simplicity of execution as Tan's procedure.

A design procedure is presented which allows for detection of faults in asynchronous sequential machines in a real time environment. Faults affecting both the output states and the internal operation of the machine are detected. The class of faults initially considered are single stuck-at-1 and stuck-at-0 faults. However, since the detection system presented is static and continuous, the class of faults detected will be greatly extended to include intermittent and a large number of multiple faults.

Observations are made relative to the choice of state assignments demonstrated in a recent note' on state assignment selection. Counter examples are given to indicate that the problem of selecting state assignments is not solved as the author implies.

Critical race-free internal-state assignments can be found by several methods. Often these methods produce several assignments for the same flow table. New and improved tests are presented that can be used to select that assignment which is most likely to produce a set of simple design equations. These tests are applicable to the next-state equations as well as the output equations. The tests are applicable to circuits that are to be realized with NAND gates or set-reset (SR) flip-flops. Another advantage of these tests is that they allow comparison between state assignments with differing numbers of internal-state variables.