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Yu Bai 0001

dblp:03/6325-1 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 2004
0000-0003-1750-358XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 70% Energy-efficient computing · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Energy-efficient computing › energy-efficient architecture
energy-efficient microarchitecture
0.012004
A low-power in-order/out-of-order issue queue · ACM Trans. Archit. Code Optim. 2004
Processor architecture and microarchitecture › out-of-order execution
issue queue design
0.012004
A low-power in-order/out-of-order issue queue · ACM Trans. Archit. Code Optim. 2004
Processor architecture and microarchitecture
out-of-order execution
0.012004
A low-power in-order/out-of-order issue queue · ACM Trans. Archit. Code Optim. 2004
Processor architecture and microarchitecture
superscalar processor
0.012004
A low-power in-order/out-of-order issue queue · ACM Trans. Archit. Code Optim. 2004

Methods — techniques the papers use, named apart from their topics

dynamic reconfiguration · 0.0FIFO partitioning · 0.0
YearPublicationVenuePosition
2004 Reducing Issue Queue Power for Multimedia Applications using a Feedback Control Algorithm
abstract
We propose a dynamic power-aware issue queue in a general-purpose microprocessor for multimedia applications. Resources can be adapted at runtime in accordance with the feedback from a formal closed-loop control system such that power dissipation is reduced while still meeting the real time target for multimedia applications. We partition the issue queue into multiple sets (i.e., FIFOs) such that only instructions at the head of each set are able to issue. We then dynamically reconfigure the issue queue by changing the number and/or size of FIFOs to satisfy specific application's needs. The optimal configuration and timing are predicted by the closed-loop control system. Our results show an average power savings of over 90% in the issue queue with a negligible affect on the performance.
Yu Bai 0001, R. Iris Bahar
ICCD1
2004 A low-power in-order/out-of-order issue queue
abstract
To better address power concerns, a good design strategy should be flexible enough to dynamically reconfigure available resources according to the application's needs such that extra power is dissipated only when it is really needed. In this work, we focus on power-aware solutions for the issue queue (IQ) in an out-of-order superscalar processor. We propose two schemes that partition the IQ into FIFOs such that only the instructions at the head of each FIFO may request to issue. We then monitor the processor and dynamically vary the number and/or size of FIFOs in accordance with utilization. Experimenting with two different distributions in power dissipation, we show up to 69% reduction in power dissipation in the wakeup and arbitration loop, while constraining performance degradation to be no more than 5%.
Yu Bai 0001, R. Iris Bahar
ACM Trans. Archit. Code Optim.1