Demo Data from EDBT 2026 / reviewers in the wild / expert
Joel N. Sturman
dblp:03/6549
· DBLP profile ↗
3ranked-venue papers
3as first author
0since 2021 · last 1971
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Processor architecture and microarchitecture · 92% Distributed systems · 8% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › special-purpose processor
iterative array computer |
0.0 | 2 | 1968 | Asynchronous Operation of an Iteratively Structured General-Purpose Digital Computer · IEEE Trans. Computers 1968 An Iteratively Structured General-Purpose Digital Computer · IEEE Trans. Computers 1968 |
Processor architecture and microarchitecture › asynchronous architecture
asynchronous operations |
0.0 | 1 | 1968 | Asynchronous Operation of an Iteratively Structured General-Purpose Digital Computer · IEEE Trans. Computers 1968 |
Distributed systems › operating system support › interprocess communication
asynchronous communication |
0.0 | 1 | 1968 | Asynchronous Operation of an Iteratively Structured General-Purpose Digital Computer · IEEE Trans. Computers 1968 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1971 | The Functional Partitioning of Memory - its Application to Interactive ComputingabstractThe objective of the effort described in this paper has been the design of computer software to reduce memory occupancy of interactive programs. This effort has resulted in the development of a batch-compatible interative system which has been operational at Bell Telephone Laboratories for over a year. In that time a small, closely monitors community of users has been established. Some details of software design are presented and measurements of interactive system performance are examined. Joel N. Sturman |
Comput. J. | 1 |
| 1968 | An Iteratively Structured General-Purpose Digital ComputerabstractA general-purpose synchronous stored-program digital computer is described. The computer is composed solely of many small, identically structured sequential machines, each machine having fewer than 211states. The one-dimensional iterative array of sequential machines, or cells, which constitutes this computer is similar to the distributed logic associative memory originally proposed by Lee. A significant difference in the machine's structure, however, arises from the fact that instructions are stored within, and are under the control of, other cells, rather than a central processing unit. No specific area of this machine acts solely as a memory, an arithmetic unit, or a control unit, but rather, one or more cells within the iterative array perform all of the above tasks. Joel N. Sturman |
IEEE Trans. Computers | 1 |
| 1968 | Asynchronous Operation of an Iteratively Structured General-Purpose Digital ComputerabstractThe preceding paper proposed a general-purpose digital computer structure consisting of many small iteratively connected sequential machines. A set of machine instructions was presented and a programming example of synchronous machine operation was given. This paper examines some of the problems associated with asynchronous operation of this iteratively structured digital computer. A solution is presented enabling the many small sequential machines which constitute the large iterative computer to communicate asynchronously. The instruction set outlined in the previous paper is maintained and a pictorial example of asynchronous operation is presented. Joel N. Sturman |
IEEE Trans. Computers | 1 |