Hardware Trojans have drawn the attention of academia, industry, and government agencies. Effective detection mechanisms and countermeasures against such malicious designs can only be developed when there is a deep understanding of how hardware Trojans can be built in practice, in particular, Trojans specifically designed to avoid detection. In this article, we present a mechanism to introduce an extremely stealthy hardware Trojan into cryptographic primitives equipped with provably-secure first-order side-channel countermeasures. Once the Trojan is triggered, the malicious design exhibits exploitable side-channel leakage, leading to successful key recovery attacks. Generally, such a Trojan requires neither addition nor removal of any logic which makes it extremely hard to detect. On ASICs, it can be inserted by subtle manipulations at the subtransistor level and on FPGAs by changing the routing of particular signals, leading to zero logic overhead. The underlying concept is based on modifying a securely masked hardware implementation in such a way that running the device at a particular clock frequency violates one of its essential properties, leading to exploitable leakage. We apply our technique to a threshold implementation of the PRESENT block cipher realized in two different CMOS technologies and show that triggering the Trojan makes the ASIC prototypes vulnerable.

This paper concentrates on high-level data-flow optimization and synthesis techniques for datapath intensive designs such as those in Digital Signal Processing (DSP), computer graphics and embedded systems applications, which are modeled as polynomial computations over Z2n1x Z2n2x . . . x Z2ndto Z2m. Our main contribution in this paper is proposing an optimization method based on functional decomposition of multivariate polynomial in the form of f(x) = g(x) o h(x) + f0= g(h(x)) + f0to obtain good building blocks, and vanishing polynomials over Z2mto add/delete redundancy to/from given polynomial functions to extract further common sub-expressions. Experimental results for combinational implementation of the designs have shown an average saving of 38.85 and 18.85 percent in the number of gates and critical path delay, respectively, compared with the state-of-the-art techniques. Regarding the comparison with our previous works, the area and delay are improved by 10.87 and 11.22 percent, respectively. Furthermore, experimental results of sequential implementations have shown an average saving of 39.26 and 34.70 percent in the area and the latency, respectively, compared with the state-of-the-art techniques.

The growing market for Digital Signal Processing (DSP), Computer graphics and embedded systems applications that can be modeled as polynomial computations in their datapath designs, requires improvements in high-level synthesis and optimization techniques for such systems. This paper concentrates on how to find common sub-expressions between s given polynomial functions over Z2n1× Z2n2× ... × Z2ndto Z2min order to optimize the area and delay as much as possible. Our main contributions in this paper is proposing an optimization method based on adding/deleting vanishing polynomials over Z2m, i.e., those polynomials that are equivalent to zero over Z2m, to/from given polynomial functions in the hope of achieving further common sub-expressions. After applying our optimization techniques, experimental comparisons with the state-of-the-art techniques show an average improvement in the area by 36.80% with an average delay decrease of 2.41%. Regarding the comparison with our previous works, the area and delay are improved by 21.4% and 8.7% respectively.

In this paper a novel steganography technique based on the combination of a secret sharing method and wavelet transform is presented. In this method, a secret image is shared into some shares. Then, the shares and Fletcher- 16 checksum of shares are hidden into cover images using an integer wavelet based steganography technique. In the decoding part, the stego images are used to recover the shares and, consequently, recover the secret image. The presented algorithm obtains high authentication capability against counterfeiting. Moreover; it is stable against serious attacks, including RS and supervisory training steganalysis methods, and it has the low detection rate under global feature extraction classifier examination.