Demo Data from EDBT 2026 / reviewers in the wild / expert
Matthew Cotter
dblp:04/10661 · also Matthew J. Cotter
· DBLP profile ↗
5ranked-venue papers
1as first author
0since 2021 · last 2015
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Hardware accelerators and domain-specific architectures · 40% Emerging computing paradigms · 30% GPUs and heterogeneous computing · 15% |
Topics — the 6 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures › accelerator integration
accelerator-rich CMP |
0.2 | 1 | 2015 | Exploring architectural heterogeneity in intelligent vision systems · HPCA 2015 |
GPUs and heterogeneous computing
heterogeneous architecture |
0.2 | 1 | 2015 | Exploring architectural heterogeneity in intelligent vision systems · HPCA 2015 |
Emerging computing paradigms › neuromorphic computing
brain-inspired computing |
0.2 | 1 | 2014 | Neuro Inspired Computing with Coupled Relaxation Oscillators · DAC 2014 |
Emerging computing paradigms
neuromorphic computing |
0.2 | 1 | 2014 | Neuro Inspired Computing with Coupled Relaxation Oscillators · DAC 2014 |
Reconfigurable computing and FPGAs
FPGA accelerator |
0.1 | 1 | 2012 | Accelerating neuromorphic vision algorithms for recognition · DAC 2012 |
Emerging computing paradigms › neuromorphic computing
pattern recognition |
0.1 | 1 | 2014 | Neuro Inspired Computing with Coupled Relaxation Oscillators · DAC 2014 |
Methods — techniques the papers use, named apart from their topics
workload characterization · 0.2architectural modeling · 0.2vanadium-dioxide thin films · 0.2relaxation oscillator · 0.2HMAX · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2015 | Exploring architectural heterogeneity in intelligent vision systemsabstractLimited power budgets and the need for high performance computing have led to platform customization with a number of accelerators integrated with CMPs. In order to study customized architectures, we model four customization design points and compare their performance and energy across a number of computer vision workloads. We analyze the limitations of generic architectures and quantify the costs of increasing customization using these micro-architectural design points. This analysis leads us to develop a framework consisting of low-power multi-cores and an array of configurable micro-accelerator functional units. Using this platform, we illustrate dataflow and control processing optimizations that provide for performance gains similar to custom ASICs for a wide range of vision benchmarks. Nandhini Chandramoorthy, Giuseppe Tagliavini, Kevin M. Irick, Antonio Pullini, Siddharth Advani, Sulaiman Al Habsi, Matthew Cotter, Jack Sampson, Narayanan Vijaykrishnan, Luca Benini |
HPCA | 7 |
| 2014 | Neuro Inspired Computing with Coupled Relaxation OscillatorsabstractHarnessing the computational capabilities of dynamical systems has attracted the attention of scientists and engineers form varied technical disciplines over decades. The time evolution of coupled, non-linear synchronous oscillatory systems has led to active research in understanding their dynamical properties and exploring their applications in brain-inspired, neuromorphic computational models. In this paper we present the realization of coupled and scalable relaxation-oscillators utilizing the metal-insulator-metal transition of vanadium-dioxide (VO2) thin films. We demonstrate the potential use of such a system in pattern recognition, as one possible computational model using such a system. Suman Datta, Nikhil Shukla, Matthew Cotter, Abhinav Parihar, Arijit Raychowdhury |
DAC | 3 |
| 2014 | A hardware accelerated multilevel visual classifier for embedded visual-assist systemsabstractEmbedded visual assist systems are emerging as increasingly viable tools for aiding visually impaired persons in their day-to-day life activities. Novel wearable devices with imaging capabilities will be uniquely positioned to assist visually impaired in activities such as grocery shopping. However, supporting such time-sensitive applications on embedded platforms requires an intelligent trade-off between accuracy and computational efficiency. In order to maximize their utility in real-world scenarios, visual classifiers often need to recognize objects within large sets of object classes that are both diverse and deep. In a grocery market, simultaneously recognizing the appearance of people, shopping carts, and pasta is an example of a common diverse object classification task. Moreover, a useful visual-aid system would need deep classification capability to distinguish among the many styles and brands of pasta to direct attention to a particular box. Exemplar Support Vector Machines (ESVMs) provide a means of achieving this specificity, but are resource intensive as computation increases rapidly with the number of classes to be recognized. To maintain scalability without sacrificing accuracy, we examine the use of a biologically-inspired classifier (HMAX) as a front-end filter that can narrow the set of ESVMs to be evaluated. We show that a hierarchical classifier combining HMAX and ESVM performs better than either of the two individually. We achieve 12% improvement in accuracy over HMAX and 4% improvement over ESVM while reducing computational overhead of evaluating all possible exemplars. Matthew Cotter, Siddharth Advani, Jack Sampson, Kevin M. Irick, Narayanan Vijaykrishnan |
ICCAD | 1 |
| 2012 | Accelerating neuromorphic vision algorithms for recognitionabstractVideo analytics introduce new levels of intelligence to automated scene understanding. Neuromorphic algorithms, such as HMAX, are proposed as robust and accurate algorithms that mimic the processing in the visual cortex of the brain. HMAX, for instance, is a versatile algorithm that can be repurposed to target several visual recognition applications. This paper presents the design and evaluation of hardware accelerators for extracting visual features for universal recognition. The recognition applications include object recognition, face identification, facial expression recognition, and action recognition. These accelerators were validated on a multi-FPGA platform and significant performance enhancement and power efficiencies were demonstrated when compared to CMP and GPU platforms. Results demonstrate as much as 7.6X speedup and 12.8X more power-efficient performance when compared to those platforms. Ahmed Al-Maashri, Michael DeBole, Matthew Cotter, Nandhini Chandramoorthy, Yang Xiao 0002, Narayanan Vijaykrishnan, Chaitali Chakrabarti |
DAC | 3 |
| 2011 | A framework for accelerating neuromorphic-vision algorithms on FPGAsabstractImplementations of neuromorphic algorithms are traditionally implemented on platforms which consume significant power, falling short of their biologically underpinnings. Recent improvements in FPGA technology have led to FPGAs becoming a platform in which these rapidly evolving algorithms can be implemented. Unfortunately, implementing designs on FPGAs still prove challenging for nonexperts, limiting their use in the neuroscience domain. In this paper, a FPGA framework is presented which enables neuroscientists to compose multi-FPGA systems for a cortical object classification model. This is demonstrated by mapping this algorithm onto two distinct platforms providing speedups of up to ~28X over a reference CPU implementation. Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Narayanan Vijaykrishnan |
ICCAD | 3 |