Coarse-Grained Reconfigurable Architectures (CGRAs) have emerged as promising solutions for energyefficient computing in edge devices and datacenter accelerators. While offering substantial performance benefits, their adoption is hindered by the NP-hard loop mapping problem during compilation. In this paper, we present NaviMap, a neuralsymbolic framework combining partial order-aware graph embeddings with deep reinforcement learning. Experimental results demonstrate that NaviMap achieves a$1.95 \times$speedup in solving CGRA mapping problems compared with state-of-the-art methods, while producing mappings with equivalent or superior performance.

Optimizing heterogeneous elastic material distribution on a 3D part to achieve desired deformation behavior is an important task in computer-aided design and additive manufacturing . This paper presents a solution to this problem, which involves interactive design, automatic deformation generation, and optimization of spatial distribution of heterogeneous elastic materials. Our method improves previous techniques in three aspects. First, we incorporates a geometric deformation-based interactive design into FEM-based optimization, which makes the solution less dependent of initial guesses of Young’s modulus values and it more likely to produce the target design even with sparse user input of displacements and forces at a limited set of mesh vertices. Second, we formulate the problem as an L 2 - or L 0 -optimization problem. The L 2 formulation outputs smoothly varying heterogeneous material distribution that accommodates multiple functions within a single part. The L 0 formulation achieves the computation of sparse material distribution in one step, which is beneficial for additive manufacturing with multi-material printers. Third, we utilize the adjoint method to derive formulae for efficiently computing the gradient of the objective functions, making it possible to quickly solve the optimization problem in the full-dimensional space of materials, which was previously infeasible. The experiments demonstrate the robustness and efficiency of our approach.

Coarse-grained reconfigurable architecture (CGRA) is an emerging hardware architecture, with reconfigurable Processing Elements (PEs) for executing operations efficiently and flexibly. One major challenge for current CGRA compilers is the scalability issue for large loop applications, where valid loop mapping results cannot be obtained in an acceptable time. This paper proposes an enhanced loop mapping method based on Graph Neural Network (GNN), which effectively addresses the scalability issue and generates valid loop mapping results for large applications. Experimental results show that the proposed method enhances the compilation time by 10.8x on average over existing methods, with even better loop mapping solutions.

With the rapid development of deep learning, training big neural network models demands huge amount of computing power.Therefore, many accelerators are designed to meet the performance requirements. Recently, series of Kunlun chips have been released, which claim comparable performance over GPUs. However, there lacks an end-to-end compiler to support both training and inference on Kunlun chip,leaving large performance optimization space to be explored. This paper presents KunlunTVM, the first end-to-end compiler based on TVM, supporting both training and inference tasks on Kunlun Chip. Experimental results show that KunlunTVM achieves up to 5x training performance improvement over the existing framework PaddlePaddle supporting Kunlun chip. It is noteworthy that the proposed methods are general and extensible for the TVM framework targeting different backends.

High-level synthesis (HLS) is widely used for transferring behavior-level specifications into circuit-level implementations. As a critical step in HLS, scheduling arranges the execution order of operations for enhanced performance. However, existing scheduling methods suffer from either exponential runtime or poor quality of solutions. This paper proposes an efficient and effective GNN-based scheduling method called NeuroSchedule, with both fast runtime and enhanced solution quality. Major features are as follows: (1) The learning problem for HLS scheduling is formulated for the first time, and a new machine learning framework is proposed. (2) Pre-training models are adopted to further enhance the scalability for various scheduling problems with different settings. Experimental results show that NeuroSchedule obtains near-optimal solutions while achieving more than 50,000x improvement in runtime compared with the ILP-based scheduling method. At the same time, NeuroSchedule improves the scheduling results by 6.10% on average compared with state-of-the-art entropy-directed method. To the best of our knowledge, this is the first GNN-based scheduling method for HLS.

Aided by the advancement of super-conductive materials, rapid single flux quantum (RSFQ) digital circuits are emerging as a promising complement or even replacement of the traditional CMOS digital integrated circuits. RSFQ digital circuits typically work at a low temperature of around 4.2 K, i.e., around −268.95 °C. Nevertheless, the operating frequency of RSFQ digital circuits reaches up to 770 GHz, which is orders of magnitudes faster than contemporary CMOS digital circuits. The high operating frequency causes critical design challenges especially for the clock networks and data path signals, where relative skew on wires need to be observed for achieving the correct functionality. Therefore, for designing a timing-variability-aware SFQ layout, it is necessary to match the PTL delays that are proportional to their respective lengths. And the matching of PTL delays should be carried out by extensions in PTL lengths. To meet the above-mentioned critical timing requirements, it is necessary to incorporate length-matching constraints into a routing problem, which is transformed from the timing requirements of matching the PTL delays during the logical synthesis stage. However, existing routing algorithms are inherently limited by preallocated splitters (SPLs), which complicates the subsequent routing stage under length-matching constraints. In this article, in order to effectively address the length-matching constraints, we reallocate SPLs to fully utilize routing resources. We propose the first multiterminal routing algorithm for RSFQ circuits, which integrates SPL reallocation into the routing stage and achieves 100% routing completion in the tested benchmarks. Compared with the state-of-the-art method, the proposed multiterminal routing algorithm reduces the required area by 17% and the runtime by 7%.

This paper presents a research vision to design a large-scale cyberphysical systems (CPS) experimental framework to enable collaborative and coordinated molecular biology studies. This framework will be based on the integration of CPS with microfluidic biochips and cloud computing. It has the potential to drastically advance personalized medicine through knowledge fusion among many research groups, and synchronization of research planning. This framework therefore leads to a better understanding of diseases such as cancer, and helps researchers in identifying effective treatments. A case study from cancer research is discussed to explain the significance of our framework in promoting coordinated genomic studies.

We present a high-performance and real-time production scheduling algorithm for digital print production based on a dynamic incremental evolutionary algorithm. The optimization objective is to prioritize the dispatching sequence of orders and balance resource utilization. The scheduler is scalable for realistic problem instances and it provides solutions quickly for diverse print products that require complex fulfillment procedures. Furthermore, it dynamically ingests the transient state of the factory, such as process information and resource failure probability in print production; therefore, it minimizes the management-production mismatch. Discrete-event simulation results show that the production scheduler leads to a higher and more stable order on-time delivery ratio compared to a rule-based heuristic. Its beneficial attributes collectively contribute to the reduction or elimination of the shortcomings that are inherent in today's digital printing environment and help to enhance a print factory's productivity and profitability.

Accurate predictions of both process-execution time and process status are crucial for the development of an intelligent enterprise information system (EIS). We have developed new automated learning-based process-execution time-prediction and process status-prediction methods that can be embedded into an EIS. Process-execution time prediction is a regression problem and state-of-the-art (baseline) time-prediction methods use a machine-learning regression model. Process status prediction is a binary classification problem in which a class labeled “completed” or “in-progress” is assigned to a process with respect to an arbitrary predictive horizon (i.e., the future time given by the method user). The methods proposed in this paper integrate statistical methods with support-vector regression. Comparison results obtained from the real data of a digital-print enterprise show that the proposed time-prediction method reduces both the relative mean error and the root-mean-squared error of the regression model. Furthermore, the proposed status-prediction method not only achieves higher classification accuracy than state-of-the-art methods, it also estimates the probability of the predicted status. In addition, algorithm development and training phases of the proposed methods do not rely on any arbitrary predictive horizon. Therefore, a single time-prediction model as proposed is sufficient for status prediction as opposed to a baseline status-prediction method that requires classification models for all potential predictive horizons.

An enterprise service-level performance time series is a sequence of data points that quantify demand, throughput, average order-delivery time, quality of service, or end-to-end cost. Analytical and predictive models of such time series can be embedded into an enterprise information system (EIS) in order to provide meaningful insights into potential business problems and generate guidance for appropriate solutions. Time-series analysis includes periodicity detection, decomposition, and correlation analysis. Time-series prediction can be modeled as a regression problem to forecast a sequence of future time-series datapoints based on the given time series. The state-of-the-art (baseline) methods employed in time-series prediction generally apply advanced machine-learning algorithms. In this article, we propose a new univariate method for dealing with midterm time-series prediction. The proposed method first analyzes the hierarchical periodic structure in one time series and decomposes it into trend, season, and noise components. By discarding the noise component, the proposed method only focuses on predicting repetitive season and smoothed trend components. As a result, this method significantly improves upon the performance of baseline methods in midterm time-series prediction. Moreover, we propose a new multivariate method for dealing with short-term time-series prediction. The proposed method utilizes cross-correlation information derived from multiple time series. The amount of data taken from each time series for training the regression model is determined by results from hierarchical cross-correlation analysis. Such a data-filtering strategy leads to improved algorithm efficiency and prediction accuracy. By combining statistical methods with advanced machine-learning algorithms, we have achieved a significantly superior performance in both short-term and midterm time-series predictions compared to state-of-the-art (baseline) methods.

On-demand digital print service is an example of a real-time embedded enterprise system. It offers mass customization and exemplifies personalized manufacturing services. Once a print order is submitted to the print factory by a client, the print service provider (PSP) needs to make a real-time decision on whether to accept or refuse this order. Based on the print factory's current capacity and the order's properties and requirements, an order is refused if its acceptance is not profitable for the PSP. The order is accepted with the most appropriate due date in order to maximize the profit that can result from this order. We have developed an automated learning-based order admission framework that can be embedded into an enterprise environment to provide real-time admission decisions for new orders. The framework consists of three classifiers: Support Vector Machine (SVM), Decision Tree (DT), and Bayesian Probabilistic Model (BPM). The classifiers are trained by history orders and used to predict completion status for new orders. A decision integration technique is implemented to combine the results of the classifiers and predict due dates. Experimental results derived using real factory data from a leading print service provider and Weka open-source software show that the order completion status prediction accuracy is significantly improved by the decision integration strategy. The proposed multiclassifier model also outperforms a standalone regression model.

The use of digital print provides unique opportunities to automate the printing process, revamp production steps, better utilize resources, and enhance productivity. This paper highlights the key role that electronic design automation (EDA) can play in the maturation of the digital print automation field. It first describes basic concepts in digital printing and digital commercial print services. Next it describes the application of discrete-event simulation to policy management and performance evaluation, and dynamic resource management using EDA flows based on scheduling and resource binding.

Advances in droplet-based digital microfluidics have led to the emergence of biochips for automating laboratory procedures in biochemistry and molecular biology. These devices enable the precise control of microliter of nanoliter volumes of biochemical samples and reagents. They combine electronics with biology, and integrate various bioassay operations, such as sample preparation, analysis, separation, and detection. Compared to conventional laboratory procedures, which are cumbersome and expensive, miniaturized digital microfluidic biochips (DMFBs) offer the advantages of higher sensitivity, lower cost, system integration, and less likelihood of human error. This tutorial paper provides an overview of DMFBs and describes emerging computer-aided design (CAD) tools for the automated synthesis and optimization of biochips, from physical modeling to fluidic-level synthesis and then to chip-level design. By efficiently utilizing the electronic design automation (EDA) technique on emerging CAD tools, users can concentrate on the development of nanoscale bioas-says, leaving chip optimization and implementation details to design-automation tools.

Microfluidics-based biochips enable the precise control of nanoliter volumes of biochemical samples and reagents. They combine electronics with biology, and they integrate various bioassay operations, such as sample preparation, analysis, separation, and detection. Compared to conventional laboratory procedures, which are cumbersome and expensive, miniaturized biochips offer the advantages of higher sensitivity, lower cost due to smaller sample and reagent volumes, system integration, and less likelihood of human error. This paper first describes the droplet-based “digital” microfluidic technology platform and emerging applications. The physical principles underlying droplet actuation are next described. Finally, the paper presents computer-aided design tools for simulation, synthesis and chip optimization. These tools target modeling and simulation, scheduling, module placement, droplet routing, pin-constrained chip design, and testing.

Digital microfluidics is the second-generation lab-on-a-chip architecture based upon micromanipulation of droplets via a programmed external electric field by an individually addressable electrode array. Dielectrophoresis (DEP) and electrowetting-on-dielectric (EWOD) are of dominant operating principles. The microfluidic mechanics of manipulating electrified droplets are complex and not entirely understood. This paper presents a numerical simulation method based on droplet electrohydrodynamics. First, a systematic validation study is shown comparing the simulation solution with both analytical and experimental data, quantitatively and qualitatively, and in both steady state and transient time sequences. Such comparison exhibits excellent agreement. Simulations are then used to illustrate its application to computer-aided design of both EWOD-driven and DEP-driven digital microfluidics.

Advances in microfluidics technology offer exciting possibilities in the realm of enzymatic analysis, DNA analysis, proteomic analysis involving proteins and peptides, immunoassays, implantable drug delivery devices, and environmental toxicity monitoring. Microfluidics-based biochips are therefore gaining popularity for clinical diagnostics and other laboratory procedures involving molecular biology. As more bioassays are executed concurrently on a biochip, system integration and design complexity are expected to increase dramatically. This paper presents different actuation mechanisms for microfluidics-based biochips, as well as associated design automation trends and challenges. The underlying physical principles of eletrokinetics, electrohydrodynamics, and thermo-capillarity are discussed. Next, the paper presents an overview of an integrated system-level design methodology that attempts to address key issues in the modeling, simulation, synthesis, testing and reconfiguration of digital microfluidics-based biochips. The top-down design automation will facilitate the integration of fluidic components with microelectronic component in next-generation system-on-chip designs.