In the Quantum-Train (QT) framework, mapping quantum state measurements to classical neural network weights is a critical challenge that affects the scalability and efficiency of hybrid quantum-classical models. The traditional QT framework employs a multi-layer perceptron (MLP) for this task, but it struggles with scalability and interpretability. To address these issues, we propose replacing the MLP with a tensor network-based model and introducing a distributed circuit ansatz designed for large-scale quantum machine learning with multiple small quantum processing unit nodes. This approach enhances scalability, efficiently represents high-dimensional data, and maintains a compact model structure. Our enhanced QT framework retains the benefits of reduced parameter count and independence from quantum resources during inference. Experimental results on benchmark datasets demonstrate that the tensor network-based QT framework achieves competitive performance with improved efficiency and generalization, offering a practical solution for scalable hybrid quantum-classical machine learning.

Critical infrastructures (CI)-including power grids, financial systems, communication networks, and transportation networks-are essential to societal stability and economic security. As these systems grow increasingly complex and interconnected, they face mounting challenges in scalability, robustness, real-time decision-making, and data privacy. While classical artificial intelligence (AI) and machine learning (ML) techniques have been applied to enhance CI monitoring, optimization, and control, they are often constrained by data heterogeneity, centralized architectures, and limited adaptability. Quantum computing (QC), known for its potential to solve certain computational problems exponentially faster than classical methods, has opened new possibilities in this domain. Quantum artificial intelligence (QAI), which combines quantum computing with AI techniques, offers transformative opportunities, particularly through paradigms such as federated quantum machine learning (FedQML) and quantum reinforcement learning (QRL). These approaches promise privacy-preserving distributed intelligence and dynamic control across CI systems. In this article, we survey recent developments in QAI and explore their applications in critical infrastructure domains. We also highlight key challenges and outline a forward-looking roadmap toward resilient, secure, and quantum-enhanced infrastructure systems.

Optimizing routing in Wireless Sensor Networks (WSNs) is pivotal for minimizing energy consumption and extending network lifetime. This paper introduces a resource-efficient compilation method for distributed quantum circuits tailored to address large-scale WSN routing problems. Leveraging a hybrid classical-quantum framework, we employ spectral clustering for network partitioning and the Quantum Approximate Optimization Algorithm (QAOA) for optimizing routing within manageable subgraphs. We formulate the routing problem as a Quadratic Unconstrained Binary Optimization (QUBO) problem, providing comprehensive mathematical formulations and complexity analyses. Comparative evaluations against traditional classical algorithms demonstrate significant energy savings and enhanced scalability. Our approach underscores the potential of integrating quantum computing techniques into wireless communication networks, offering a scalable and efficient solution for future network optimization challenges.

In this work, we introduce a Distributed Quantum Long Short-Term Memory (QLSTM) framework that leverages modular quantum computing to address scalability challenges on Noisy Intermediate-Scale Quantum (NISQ) devices. By embedding variational quantum circuits into LSTM cells, the QLSTM captures long-range temporal dependencies, while a distributed architecture partitions the underlying Variational Quantum Circuits (VQCs) into smaller, manageable subcircuits that can be executed on a network of quantum processing units. We assess the proposed framework using nontrivial benchmark problems such as damped harmonic oscillators and Nonlinear Autoregressive Moving Average sequences. Our results demonstrate that the distributed QLSTM achieves stable convergence and improved training dynamics compared to classical approaches. This work underscores the potential of modular, distributed quantum computing architectures for large-scale sequence modeling, providing a foundation for the future integration of hybrid quantum-classical solutions into advanced Quantum High-performance computing (HPC) ecosystems.

Quantum Phase Estimation (QPE) stands as a pivotal quantum computing subroutine that necessitates an inverse Quantum Fourier Transform (QFT). However, it is imperative to recognize that enhancing the precision of the estimation inevitably results in a significantly deeper circuit. We developed a variational quantum circuit (VQC) approximation to reduce the depth of the QPE circuit, yielding enhanced performance in noisy simulations and real hardware. Our experiments demonstrated that the VQC outperformed both Noisy QPE simulation and standard QPE on real hardware by reducing circuit noise. This VQC integration into quantum compilers as an intermediate step between input and transpiled circuits holds significant promise for quantum algorithms with deep circuits. Future research will explore its potential applicability across various quantum computing hardware architectures.

The wavelength-routed optical network-on-chip (WRONoC) emerges as a promising solution for multi-core system communication, providing high-bandwidth, high-speed, and low-power transmission. As the number of cores in a WRONoC increases, however, some WRONoC topologies could be infeasible with bandwidth and crosstalk constraints if bit-level parallelism is not considered during topology generation. Previous work optimized the parallelism only for the radius selection of microring resonators but not for topology generation. To remedy this drawback, we present a parallelism-aware WRONoC topology generation flow. The proposed flow guarantees to generate a parallelism-optimal topology for full connectivity; and a parallelism-optimal topology for customized connectivity if the netlist meets certain conditions. Compared with the state-of-the-art methods, experimental results show a 67.5% improvement in parallelism.

The dramatic growth of hardware attacks and the lack of security-concern solutions in design tools lead to severe security problems in modern IC designs. Although many existing countermeasures provide decent protection against security issues, they still lack the global design view with sufficient security consideration in design time. This paper proposes a security-aware framework against Trojan insertion, frontside probing, and fault injection attacks at the design stage. The framework consists of two major techniques: (1) a large-scale shielding method that effectively covers the exposed areas of assets and (2) a cell-movement-based method to eliminate the empty spaces vulnerable to Trojan insertion. Experimental results show that our framework effectively reduces the vulnerability of these attacks and achieves the best overall score compared with the top-3 teams in the 2022 ACM ISPD Security Closure of Physical Layouts Contest.

The optical interconnection is a promising solution for on-chip signal communication in modern system-on-chip (SoC) and heterogeneous integration designs, providing large bandwidth and high-speed transmission with low power consumption. Previous works do not handle two main issues for on-chip optical-electrical (O-E) co-design: the thermal impact during O-E routing and the trade-offs among power consumption, wirelength, and congestion. As a result, the thermal-induced band shift might incur transmission malfunction; the power consumption estimation is inaccurate; thus, only suboptimal results are obtained. To remedy these disadvantages, we present a thermal-aware optical-electrical routing co-design flow to minimize power consumption, thermal impact, and wirelength. Experimental results based on the ISPD 2019 contest benchmarks show that our co-design flow significantly outperforms state-of-the-art works in power consumption, thermal impact, and wire-length.

High efficiency, high power density and wide constant power region are all the required functions of the traction motor and drive in electric vehicle applications. However, these requirements are mainly dependent on the output line voltage utilization of the motor drivers. Generally, electric vehicle use over-modulation to increase voltage utilization under constant output voltage of battery. A six-step voltage control method without current control loops is proposed to increase output torque and power of IPMSM at middle and high speed region. The relation between generated torque and both amplitude of DC-link voltage and phase leading voltage angle of six-step voltage is derived carefully on this research. The proposed method is analyzed by Fourier series for mathematical derivation. Moreover, the efficiency of motor and its drive are improved due to the current harmonics and switching losses of PWM are reduced by the six-step voltage control. The proposed motor drive consists of two power modules controlled by single DSP. The front end is a DC-DC converter connected to battery to generate a variable voltage with fast response according to the motor speed. The second stage is an inverter which provides vector control and the proposed six-step voltage control for IPMSM. Finally, some simulated and experimental results are made on a 6kW IPMSM to show the correctness of the proposed analysis method.

A selective-mapping (SLM) scheme which does not require the transmission of side information and can reduce the peak to average power ratio (PAPR) in turbo coded orthogonal frequency-division multiplexing (OFDM) systems is proposed. The candidates of the proposed SLM are respectively generated by a turbo encoder using various interleavers. The waiver of side information can avoid the degradation of error rate performance which results from the incorrect recovery of side information at receiver in the conventional SLM OFDM system.