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Chow Sit Tsang-Ping

dblp:04/2847 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1996
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 65% Parallel and multicore computing · 35%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › technology computer-aided design
device simulation
0.011996
A parallel implementation of an electrothermal simulation for GaAs MESFET devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Electronic design automation
electrothermal simulation
0.011996
A parallel implementation of an electrothermal simulation for GaAs MESFET devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Parallel and multicore computing › parallel computing
parallel scientific computing
0.011996
A parallel implementation of an electrothermal simulation for GaAs MESFET devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Electronic design automation › technology computer-aided design
semiconductor device simulation
0.011996
A parallel implementation of an electrothermal simulation for GaAs MESFET devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Parallel and multicore computing › parallel programming models
message passing
0.011996
A parallel implementation of an electrothermal simulation for GaAs MESFET devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Parallel and multicore computing › parallel architecture
MIMD architecture
0.011996
A parallel implementation of an electrothermal simulation for GaAs MESFET devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996

Methods — techniques the papers use, named apart from their topics

gauss-seidel iteration · 0.0finite difference scheme · 0.0
YearPublicationVenuePosition
1996 A parallel implementation of an electrothermal simulation for GaAs MESFET devices
abstract
This paper describes the implementation of a Gallium Arsenide (GaAs) Metal-Semiconductor Field Effect Transistor (MESFET) device simulation on a relatively low cost transputer-based parallel system. The physical modeling consists of a comprehensive two-dimensional energy transport time-dependent model taking into account thermal heating effects within the device lattice suitable for steady-state and transient analysis. The semiconductor equations are solved by a Gauss-Seidel point iterative method with successive relaxation and discretised using a finite-difference scheme on a nonuniform grid. Algorithms targeted at message passing Multiple-Instructions Multiple Data (MIMD) distributed memory architectures are described. The efficiency and stability of the parallel algorithms are briefly discussed. A performance model which characterizes the simulation in terms of its efficiency and speed-up for any problem size on any number of processors is presented. A parallel speed-up of 14 is feasible on an array of 16 transputers for a typical MESFET simulation.
Chow Sit Tsang-Ping, Christopher M. Snowden, David M. Barry
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1