S-Connect is a new high speed, scalable interconnect system that has been developed to support networks of workstations to efficiently share computing resources. It uses off-the-shelf CMOS technology to directly drive fiber-optic systems at speeds greater than 1 Gbit/sec and can realize bisection bandwidths comparable to high-end MPP systems while being >10x more cost-effective. S-Connect systems do not rely on centralized switches, but rather are composed of adaptive, topology independent routing elements that are integrated into each node. The S-Connect routing algorithm is optimized for fine grained, irregular traffic and is designed to support high traffic loads, that can utilize most of the physically available bandwidth. Such traffic is typical of a distributed shared memory system, which is one of the intended applications. S-Connect innovations include a novel distributed phase locking method that allows global synchronization, HW support for multiple message priorities, in-band monitoring and control facilities, and a low overhead channel protocol that supports multiple in-transit messages on the same fiber.The first version of the S-Connect switching element has been successfully implemented in a commercial, 0.65 µm CMOS process.

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Copyright 1991, Association for Computing Machinery, Inc. Reprinted by permission. This paper originally appeared in Proceedings of the Fourth International Conference on Architecture Support for Programming Languages and Operating Systems (ASPLOS), Santa Clara, California, April 8-11, 1991. The dynamic instruction counts on MIPS and SPARC are compared using the SPEC benchmarks. MIPS typically executes more user-level instructions than SPARC. This difference can be counted for by architectural differences, compiler differences, and library differences. The most significant differences are that SPARC's double-precision floating point load/store is an architectural advantage in the SPEC floating point benchmarks while MIPS's compare-and-branch instruction is an architectural advantage in the SPEC integer benchmarks. After the differences in the two architectures are isolated, it appears that although MIPS and SPARC each have strengths and weaknesses in their compilers and library routines, the combined effect of compilers and library routines does not give either MIPS or SPARC a clear advantage in these areas.