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Arvind Seshadri

dblp:04/3992 · DBLP profile ↗
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9ranked-venue papers
5as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 4 · 1 first-authorSoftware engineering, systems software and programming languages · 3 · 2 first-authorSystems, architecture and hardware · 1Computer networks · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
5 papers
Systems and software security · 55% Hardware security and side channels · 42% Malware analysis · 3%
Software engineering, system software, and programming languages
2 papers
Program verification · 80% Operating systems · 20%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 85% Embedded and real-time systems · 15%

Topics — the 14 heaviest of 15, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels
trusted execution environments
0.232007
Minimal TCB Code Execution · S&P 2007
SecVisor: a tiny hypervisor to provide lifetime kernel code integrity for commodity OSes · SOSP 2007
Pioneer: verifying code integrity and enforcing untampered code execution on legacy systems · SOSP 2005
Program verification
model checking
0.112010
Scalable Parametric Verification of Secure Systems: How to Verify Reference Monitors without Worrying about Data Structure Size · IEEE Symposium on Security and Privacy 2010
Program verification › concurrent program verification
parameterized verification
0.112010
Scalable Parametric Verification of Secure Systems: How to Verify Reference Monitors without Worrying about Data Structure Size · IEEE Symposium on Security and Privacy 2010
Systems and software security › trusted computing
TCB minimization
0.112008
How low can you go?: recommendations for hardware-supported minimal TCB code execution · ASPLOS 2008
Processor architecture and microarchitecture
hardware-assisted security
0.112008
How low can you go?: recommendations for hardware-supported minimal TCB code execution · ASPLOS 2008
Hardware security and side channels
attestation
0.112007
Minimal TCB Code Execution · S&P 2007
Systems and software security › isolation
hypervisor-based isolation
0.112007
SecVisor: a tiny hypervisor to provide lifetime kernel code integrity for commodity OSes · SOSP 2007
Systems and software security
operating system security
0.112007
SecVisor: a tiny hypervisor to provide lifetime kernel code integrity for commodity OSes · SOSP 2007
Systems and software security › software integrity
software integrity verification
0.112005
Pioneer: verifying code integrity and enforcing untampered code execution on legacy systems · SOSP 2005
Systems and software security › trusted computing
software attestation
0.012004
SWATT: SoftWare-based ATTestation for Embedded Devices · S&P 2004
Operating systems › virtualization
hypervisor security
0.012010
Scalable Parametric Verification of Secure Systems: How to Verify Reference Monitors without Worrying about Data Structure Size · IEEE Symposium on Security and Privacy 2010
Systems and software security › operating system security
kernel rootkit defense
0.012007
SecVisor: a tiny hypervisor to provide lifetime kernel code integrity for commodity OSes · SOSP 2007
Malware analysis › rootkit detection
kernel rootkit detection
0.012005
Pioneer: verifying code integrity and enforcing untampered code execution on legacy systems · SOSP 2005
Embedded and real-time systems
embedded system security
0.012004
SWATT: SoftWare-based ATTestation for Embedded Devices · S&P 2004

Methods — techniques the papers use, named apart from their topics

CPU-based security technology · 0.2hardware support · 0.1temporal specification logic · 0.1parametric guarded command language · 0.1model checking · 0.1software-based attestation · 0.1checksum verification · 0.1hypervisor · 0.1code integrity verification · 0.1untrusted host verification · 0.1attestation · 0.1
YearPublicationVenuePosition
2011 SAKE: Software attestation for key establishment in sensor networks
Arvind Seshadri, Mark Luk, Adrian Perrig
Ad Hoc Networks1
2010 Scalable Parametric Verification of Secure Systems: How to Verify Reference Monitors without Worrying about Data Structure Size
abstract
The security of systems such as operating systems, hypervisors, and web browsers depend critically on reference monitors to correctly enforce their desired security policy in the presence of adversaries. Recent progress in developing reference monitors with small code size and narrow interfaces has made automated formal verification of reference monitors a more tractable goal. However, a significant remaining factor for the complexity of automated verification is the size of the data structures (e.g., access control matrices) over which the programs operate. This paper develops a parametric verification technique that scales even when reference monitors and adversaries operate over unbounded, but finite data structures. Specifically, we develop a parametric guarded command language for modeling reference monitors and adversaries. We also present a parametric temporal specification logic for expressing security policies that the monitor is expected to enforce. The central technical results of the paper are a set of small model theorems. These theorems state that in order to verify that a policy is enforced by a reference monitor with an arbitrarily large data structure, it is sufficient to model check the monitor with just one entry in its data structure. We apply our methodology to verify the designs of two hypervisors, SecVisor and the sHype mandatory-access-control extension to Xen. Our approach is able to prove that sHype and a variant of the original SecVisor design correctly enforces the expected security properties in the presence of powerful adversaries.
Jason Franklin, Sagar Chaki, Anupam Datta, Arvind Seshadri
IEEE Symposium on Security and Privacy4
2008 How low can you go?: recommendations for hardware-supported minimal TCB code execution
abstract
We explore the extent to which newly available CPU-based security technology can reduce the Trusted Computing Base (TCB) for security-sensitive applications. We find that although this new technology represents a step in the right direction, significant performance issues remain. We offer several suggestions that leverage existing processor technology, retain security, and improve performance. Implementing these recommendations will finally allow application developers to focus exclusively on the security of their own code, enabling it to execute in isolation from the numerous vulnerabilities in the underlying layers of legacy code.
Jonathan M. McCune, Bryan Parno, Adrian Perrig, Michael K. Reiter, Arvind Seshadri
ASPLOS5
2008 SAKE: Software Attestation for Key Establishment in Sensor Networks
Arvind Seshadri, Mark Luk, Adrian Perrig
DCOSS1
2007 SecVisor: a tiny hypervisor to provide lifetime kernel code integrity for commodity OSes
abstract
We propose SecVisor, a tiny hypervisor that ensures code integrity for commodity OS kernels. In particular, SecVisor ensures that only user-approved code can execute in kernel mode over the entire system lifetime. This protects the kernel against code injection attacks, such as kernel rootkits. SecVisor can achieve this propertyeven against an attacker who controls everything but the CPU, the memory controller, and system memory chips. Further, SecVisor can even defend against attackers with knowledge of zero-day kernel exploits.
Arvind Seshadri, Mark Luk, Ning Qu, Adrian Perrig
SOSP1
2007 Minimal TCB Code Execution
abstract
We propose an architecture that allows code to execute in complete isolation from other software while trusting only a tiny software base that is orders of magnitude smaller than even minimalist virtual machine monitors. Our technique also enables more meaningful attestation than previous proposals, since only measurements of the security-sensitive portions of an application need to be included. We achieve these guarantees by leveraging hardware support provided by commodity processors from AMD and Intel that are shipping today.
Jonathan M. McCune, Bryan Parno, Adrian Perrig, Michael K. Reiter, Arvind Seshadri
S&P5
2007 Turtles All the Way Down: Research Challenges in User-Based Attestation
Jonathan M. McCune, Adrian Perrig, Arvind Seshadri, Leendert van Doorn
HotSec3
2005 Pioneer: verifying code integrity and enforcing untampered code execution on legacy systems
abstract
We propose a primitive, called Pioneer, as a first step towards verifiable code execution on untrusted legacy hosts. Pioneer does not require any hardware support such as secure co-processors or CPU-architecture extensions. We implement Pioneer on an Intel Pentium IV Xeon processor. Pioneer can be used as a basic building block to build security systems. We demonstrate this by building a kernel rootkit detector.
Arvind Seshadri, Mark Luk, Elaine Shi, Adrian Perrig, Leendert van Doorn, Pradeep K. Khosla
SOSP1
2004 SWATT: SoftWare-based ATTestation for Embedded Devices
abstract
We expect a future where we are surrounded by embedded devices, ranging from Java-enabled cell phones to sensor networks and smart appliances. An adversary can compromise our privacy and safety by maliciously modifying the memory contents of these embedded devices. In this paper, we propose a softWare-based attestation technique (SWATT) to verify the memory contents of embedded devices and establish the absence of malicious changes to the memory contents. SWATT does not need physical access to the device's memory, yet provides memory content attestation similar to TCG or NGSCB without requiring secure hardware. SWATT can detect any change in memory contents with high probability, thus detecting viruses, unexpected configuration settings, and Trojan Horses. To circumvent SWATT, we expect that an attacker needs to change the hardware to hide memory content changes. We present an implementation of SWATT in off-the-shelf sensor network devices, which enables us to verify the contents of the program memory even while the sensor node is running.
Arvind Seshadri, Adrian Perrig, Leendert van Doorn, Pradeep K. Khosla
S&P1