Demo Data from EDBT 2026 / reviewers in the wild / expert
Ibrahima Komara
dblp:05/11472
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2012
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test
diagnosis |
0.1 | 1 | 2012 | Test-data volume optimization for diagnosis · DAC 2012 |
Electronic design automation
hardware verification and test |
0.1 | 1 | 2012 | Test-data volume optimization for diagnosis · DAC 2012 |
Electronic design automation › hardware verification and test
test data volume reduction |
0.1 | 1 | 2012 | Test-data volume optimization for diagnosis · DAC 2012 |
Methods — techniques the papers use, named apart from their topics
statistical learning · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2012 | Test-data volume optimization for diagnosisabstractTest data collection for a failing integrated circuit (IC) can be very expensive and time consuming. Many companies now collect a fix amount of test data regardless of the failure characteristics. As a result, limited data collection could lead to inaccurate diagnosis, while an excessive amount increases the cost not only in terms of unnecessary test data collection but also increased cost for test execution and data-storage. In this work, the objective is to develop a method for predicting the precise amount of test data necessary to produce an accurate diagnosis. By analyzing the failing outputs of an IC during its actual test, the developed method dynamically determines which failing test pattern to terminate testing, producing an amount of test data that is sufficient for an accurate diagnosis analysis. The method leverages several statistical learning techniques, and is evaluated using actual data from a population of failing chips and five standard benchmarks. Experiments demonstrate that test-data collection can be reduced by > 30% (as compared to collecting the full-failure response) while at the same time ensuring >90% diagnosis accuracy. Prematurely terminating test-data collection at fixed levels (e.g., 100 failing bits) is also shown to negatively impact diagnosis accuracy. Osei Poku, Xiaochun Yu, Sizhe Liu, Ibrahima Komara, R. D. (Shawn) Blanton |
DAC | 5 |