This paper proposes and investigates a short-channel MOSFET model down to a 0.1-/spl mu/m regime for the frequency-domain analysis of the device operation through the harmonic balance technique. The efficiency and the preciseness of our method are validated by comparison of simulation results with the two-dimensional time-domain simulation tool, MEDICI. Along with the carrier transport model, the displacement current components are included in the terminal current equations for the extended analysis under external circuit environments.

We propose a harmonic balance technique for the frequency-domain analysis of the metal-oxide-semiconductor field-effect transistor (MOSFET) operation. The MOSFET model in our approach is based on the charge-sheet and the nonquasi-static MOSFET models in the channel region with a harmonic balance technique applied to the channel charges. It is shown that the proposed method renders a computationally efficient tool to analyze the harmonic distortion occurrence in the MOSFET device due to the nonlinear response of the channel charges.

A two-dimensional device simulator SNU-2D based on the hydrodynamic model is developed for the simulation and analysis of submicron devices. The simulator has the capacity for both self-consistent steady-state and transient-state simulation. To obtain better convergence and numerical stability, we adopt an improved discretization scheme for the carrier energy flux equation and a new strategy for the transient simulation. In steady-state simulation the new discretization scheme shows a considerable improvement in convergence rate and numerical accuracy compared with the existing schemes. A transient simulation study is carried out on a deep submicron n-MOSFET used in the sense amplifier of SRAM cells to investigate the gate-switching characteristic. It is found that the behavior of carrier temperature is quasi-static during the switching time even for very fast switching speed, while the behavior of impact ionization under transient mode deviates from that under dc mode as the switching speed increases.>

Proposes an optimization procedure for the bipolar base doping profile for a high-speed BiCMOS circuit. This procedure aims to achieve the minimum propagation delay time, taking the power supply, the load capacitance, and the bipolar device layout into consideration. For a small load capacitance, the peak base doping concentration and the base width should be as small as possible. However, for a high load capacitance, the optimized base doping profile can vary under the emitter area constraint. Utilizing this optimization procedure, it will be shown that the propagation delay time can be reduced by more than 30% at the same MOS current (I/sub MOS/=1 mA) through the coordinated reduction of both the vertical doping profile and the horizontal dimensions of the bipolar transistor, with the power supply voltage scaled from 5 to 3.3 V.>

A particle simulation method is introduced in which two kinds of particle models are used in one device. A conventional Monte Carlo particle model is used in the region where nonstatic effects are evident, and a particle model based on Langevin's equation is used in the region where the drift-diffusion approximation is valid. In this way it is possible to obtain efficiency and the required physical accuracy in device simulation. For the validity of this scheme, a silicon n/sup +/-n-n/sup +/ structure is simulated, and some important results are presented.>