Natural language processing methods are widely used to study the relationship between traditional Chinese medicine (TCM) prescriptions and diseases in textual data, and the results can discover the essence of TCM literature. In this paper, we get TCM treatment information from the abstract text at first by using the web crawlers. Second, the eigenvectors will be selected from the cleaned abstract text through syntactic analysis and feature extraction method of natural language processing. Then, artificial labeling part of the data is carried out based on different SVM classification models. The SVM classifier with TF-IDF feature vector is better. Last, we use the trained classifiers to classify all the data to construct the relationship between TCM prescriptions and diseases by performing neural network training, and predict the prescription for the treatment of the disease with the trained model. The result shows that our method has a certain positive effect on the research of Chinese medicine treatment diseases.

In this paper, a new train of thought for the fault analyzing of the power transmission line is proposed. Firstly, the generalized state-space model of the power transmission line is built. Then based on the model, the power transmission line can be described as a first-order static physical system. Secondly, the internal description and external description of the static physical system of the line are established separately. Thirdly, the prefault/fault characteristics are analyzed in a section of power transmission line from a generalized state-space model perspective. Fourthly, the correctness of the theoretical analysis for the fault of power transmission line is verified by the MATLAB/Simulink simulation. Finally, a conclusion is made in this paper.

Microgrid (MG) system with multienergy resources has a wide and dispatchable generation range and shows instant response, therefore, constituting a potentially suitable real-time power balancing resource. In this paper, we introduce the concept of MG aggregator to involve small-scale MGs in real-time balancing market bidding via a hierarchical market framework. At the upper real-time market level, the bidding strategy of aggregator is optimized by a risk-constrained mean-variance model to depress the effects of renewable energy sources (RES) uncertainty; at the lower intramarket level, an event-driven mechanism is presented to reach the cleared quantity of the upper market while realizing maximum economy. Furthermore, the above-centralized self-scheduling problem of MG aggregator is decomposed into individual MG optimization problems to achieve an optimal solution with fast convergence. Simulation results verify that the proposed market framework and the bidding strategy for MG aggregator are of high applicability in real market environment.

Due to the spatial-locality property of data caches and the temporal-locality property of instruction caches, significant leakage reduction can be achieved by switching a large number of cache lines into the low-power standby or drowsy mode. It has been shown that 80%-90% of the data cache lines can be maintained in drowsy state without affecting the performance by more than 0.6% (IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 12, no. 2, pp. 167-184, Feb. 2004). However, with the introduction of the drowsy-cache design technique, new fault behaviors appear and more restrictive design rules must be applied to the chip fabrication process. In this paper, we simulate all possible spot defects (SDs) under normal mode and drowsy mode in different resistance regions using HSpice. Six new fault models appear with the introduction of drowsy mode for memory arrays. When we derive a march algorithm for the new fault models of this low-power cache, several simplification rules are utilized to reduce the test complexity. According to these simplification rules, each of these new faults has its equivalent counterpart existent in both data caches and instruction caches. As a result, we develop a march algorithm which can detect all SDs in either data caches or instruction caches. Since some faults occur only in drowsy mode, a built-in self-repair (BISR) scheme is developed. By utilizing BISR, the cache can still work even if some cache lines fail to work in drowsy mode

With the introduction of the drowsy cache design technique (Kim et al., 2004), new fault behaviors appear and more restrictive design rules must be applied to the chip fabrication process. In this research, we simulate all possible spot defects (SDs) under normal mode and drowsy mode in different resistance regions using HSpice. Six new fault models appear with the introduction of drowsy mode for memory arrays. When we derive a march algorithm for the new fault models of this low-power cache, several simplification rules are utilized to reduce the test complexity. As a result, we develop a march algorithm which can detect all SDs in either data caches or instruction caches. Since some faults occur only in drowsy mode, a built-in self-repair (BISR) scheme is developed. By utilizing BISR, the cache can still work even if some cache lines fail to work in drowsy mode