Demo Data from EDBT 2026 / reviewers in the wild / expert
Wenbin Fang
dblp:05/5672
· DBLP profile ↗
6ranked-venue papers
4as first author
0since 2021 · last 2012
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-authorDatabases, data management, data science and information retrieval · 2 · 2 first-authorSecurity and privacy · 1 · 1 first-authorHuman-computer interaction and ubiquitous computing · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Parallel and multicore computing · 36% Storage systems · 31% GPUs and heterogeneous computing · 28% | |
| Databases, data mining, and information retrieval
1 paper |
Query processing and optimization · 100% |
Topics — the 8 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing › data-parallel programming
mapreduce |
0.1 | 1 | 2011 | Mars: Accelerating MapReduce with Graphics Processors · IEEE Trans. Parallel Distributed Syst. 2011 |
Parallel and multicore computing
parallel programming models |
0.1 | 1 | 2011 | Mars: Accelerating MapReduce with Graphics Processors · IEEE Trans. Parallel Distributed Syst. 2011 |
Query processing and optimization › query execution › hardware-accelerated query processing
GPU-accelerated query processing |
0.1 | 1 | 2010 | Database Compression on Graphics Processors · Proc. VLDB Endow. 2010 |
Storage systems › data compression
database compression |
0.1 | 1 | 2010 | Database Compression on Graphics Processors · Proc. VLDB Endow. 2010 |
Storage systems › data compression
lightweight compression |
0.1 | 1 | 2010 | Database Compression on Graphics Processors · Proc. VLDB Endow. 2010 |
GPUs and heterogeneous computing
CPU-GPU heterogeneous computing |
0.0 | 1 | 2011 | Mars: Accelerating MapReduce with Graphics Processors · IEEE Trans. Parallel Distributed Syst. 2011 |
High-performance computing
data transfer |
0.0 | 1 | 2010 | Database Compression on Graphics Processors · Proc. VLDB Endow. 2010 |
GPUs and heterogeneous computing
GPU memory management |
0.0 | 1 | 2010 | Database Compression on Graphics Processors · Proc. VLDB Endow. 2010 |
Methods — techniques the papers use, named apart from their topics
partial decompression · 0.2compression planner · 0.2task partitioning · 0.1data distribution · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2012 | Automated tracing and visualization of software security structure and propertiesabstractVisualizing a program's structure and security characteristics is the intrinsic part of in-depth software security assessment. Such an assessment is typically an analyst-driven task. The visualization for security analysis is usually labor-intensive, since analysts need to read documents and source code, synthesize trace data from multiple sources (e.g., system utilities like lsof or strace). To help address this problem, we propose SecSTAR, a tool that dynamically collects the key information from a system and automatically produces the necessary diagrams to support the first steps of widely-used security analysis methodologies, such as Microsoft Threat Modeling and UW/UAB First Principles Vulnerability Assessment (FPVA). SecSTAR uses an efficient dynamic binary instrumentation technique, self-propelled instrumentation, to collect trace data from production systems during runtime then automatically produces diagrams. Furthermore, SecSTAR allows analysts to interactively view and explore diagrams in a web browser. For example, analysts can navigate the diagrams through time and at different levels of detail. We demonstrated the usefulness of using SecSTAR to produce FPVA-style diagrams for a widely used and complex distributed middleware system, the Condor high-throughput scheduling system. Compared with the original manual approach in FPVA, SecSTAR shortened the initial diagram construction time from months to hours and constructed a more accurate diagram visualizing the complete runtime structure of Condor. Wenbin Fang, Barton P. Miller, James A. Kupsch |
VizSEC | 1 |
| 2011 | Mars: Accelerating MapReduce with Graphics ProcessorsabstractWe design and implement Mars, a MapReduce runtime system accelerated with graphics processing units (GPUs). MapReduce is a simple and flexible parallel programming paradigm originally proposed by Google, for the ease of large-scale data processing on thousands of CPUs. Compared with CPUs, GPUs have an order of magnitude higher computation power and memory bandwidth. However, GPUs are designed as special-purpose coprocessors and their programming interfaces are less familiar than those on the CPUs to MapReduce programmers. To harness GPUs' power for MapReduce, we developed Mars to run on NVIDIA GPUs, AMD GPUs as well as multicore CPUs. Furthermore, we integrated Mars into Hadoop, an open-source CPU-based MapReduce system. Mars hides the programming complexity of GPUs behind the simple and familiar MapReduce interface, and automatically manages task partitioning, data distribution, and parallelization on the processors. We have implemented six representative applications on Mars and evaluated their performance on PCs equipped with GPUs as well as multicore CPUs. The experimental results show that, the GPU-CPU coprocessing of Mars on an NVIDIA GTX280 GPU and an Intel quad-core CPU outperformed Phoenix, the state-of-the-art MapReduce on the multicore CPU with a speedup of up to 72 times and 24 times on average, depending on the applications. Additionally, integrating Mars into Hadoop enabled GPU acceleration for a network of PCs. Wenbin Fang, Bingsheng He, Qiong Luo 0001, Naga K. Govindaraju |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 2010 | Data-driven testing methodology for RFID systems
An Lu, Wenbin Fang, Chang Xu 0001, Shing-Chi Cheung, Yu Liu 0078 |
Frontiers Comput. Sci. China | 2 |
| 2010 | Database Compression on Graphics ProcessorsabstractQuery co-processing on graphics processors (GPUs) has become an effective means to improve the performance of main memory databases. However, this co-processing requires the data transfer between the main memory and the GPU memory via a low-bandwidth PCI-E bus. The overhead of such data transfer becomes an important factor, even a bottleneck, for query co-processing performance on the GPU. In this paper, we propose to use compression to alleviate this performance problem. Specifically, we implement nine lightweight compression schemes on the GPU and further study the combinations of these schemes for a better compression ratio. We design a compression planner to find the optimal combination. Our experiments demonstrate that the GPU-based compression and decompression achieved a processing speed up to 45 and 56 GB/s respectively. Using partial decompression, we were able to significantly improve GPU-based query co-processing performance. As a side product, we have integrated our GPU-based compression into MonetDB, an open source column-oriented DBMS, and demonstrated the feasibility of offloading compression and decompression to the GPU. Wenbin Fang, Bingsheng He, Qiong Luo 0001 |
Proc. VLDB Endow. | 1 |
| 2009 | Frequent itemset mining on graphics processorsabstractWe present two efficient Apriori implementations of Frequent Itemset Mining (FIM) that utilize new-generation graphics processing units (GPUs). Our implementations take advantage of the GPU's massively multi-threaded SIMD (Single Instruction, Multiple Data) architecture. Both implementations employ a bitmap data structure to exploit the GPU's SIMD parallelism and to accelerate the frequency counting operation. One implementation runs entirely on the GPU and eliminates intermediate data transfer between the GPU memory and the CPU memory. The other implementation employs both the GPU and the CPU for processing. It represents itemsets in a trie, and uses the CPU for trie traversing and incremental maintenance. Our preliminary results show that both implementations achieve a speedup of up to two orders of magnitude over optimized CPU Apriori implementations on a PC with an NVIDIA GTX 280 GPU and a quad-core CPU. Wenbin Fang, Mian Lu, Xiangye Xiao, Bingsheng He, Qiong Luo 0001 |
DaMoN | 1 |
| 2008 | Mars: a MapReduce framework on graphics processorsabstractWe design and implement Mars, a MapReduce framework, on graphics processors (GPUs). MapReduce is a distributed programming framework originally proposed by Google for the ease of development of web search applications on a large number of commodity CPUs. Compared with CPUs, GPUs have an order of magnitude higher computation power and memory bandwidth, but are harder to program since their architectures are designed as a special-purpose co-processor and their programming interfaces are typically for graphics applications. As the first attempt to harness GPU's power for MapReduce, we developed Mars on an NVIDIA G80 GPU, which contains over one hundred processors, and evaluated it in comparison with Phoenix, the state-of-the-art MapReduce framework on multi-core CPUs. Mars hides the programming complexity of the GPU behind the simple and familiar MapReduce interface. It is up to 16 times faster than its CPU-based counterpart for six common web applications on a quad-core machine. Bingsheng He, Wenbin Fang, Qiong Luo 0001, Naga K. Govindaraju, Tuyong Wang |
PACT | 2 |