Existing brain-computer interface (BCI) control of highly dexterous robotic manipulators and prosthetic devices typically rely solely on neural decode algorithms to determine the user's intended motion. Although these approaches have made significant progress in the ability to control high degree of freedom (DOF) manipulators, the ability to perform activities of daily living (ADL) is still an ongoing research endeavor. In this paper, we describe a hybrid system that combines elements of autonomous robotic manipulation with neural decode algorithms to maneuver a highly dexterous robotic manipulator for a reach and grasp task. This system was demonstrated using a human patient with cortical micro-electrode arrays allowing the user to manipulate an object on a table and place it at a desired location. The preliminary results for this system are promising in that it demonstrates the potential to blend robotic control to perform lower level manipulation tasks with neural control that allows the user to focus on higher level tasks thereby reducing the cognitive load and increasing the success rate of performing ADL type activities.

The cross-correlation function is an important yet computationally intensive processing step in many engineering applications such as wireless communication and object recognition. A neuromorphic approach to this function has been shown to facilitate implementation using a neural-based architecture. Using a custom designed array of silicon neurons on a compact, low-power chip, we demonstrate a cross-correlation system based on two half center oscillators. These preliminary results show the validity of this approach and could provide an elegant solution to wireless communication systems in the next generation of neuroprosthetic devices.

There are various neuron models which can be used to emulate the neural networks responsible for cortical and spinal processes. One example is the Central Pattern Generator (CPG) networks, which are spinal neural circuits responsible for controlling the timing of periodic systems in vertebrates. In order to model the CPG effectively, it is necessary to model not just multiple individual neurons, but also the interactions between them. Due to the complexity of these types of systems, CPG models typically require large numbers (> 10) of parameters making them difficult to understand and control. Genetic Algorithms (GAs) provide a means for optimizing systems with many parameters. We present an automated method that uses a GA to And sets of parameters for a silicon implementation of a neural network capable of producing CPG type signals. This methodology can be used to configure large silicon neural circuits. In this work, constructed networks involving an 18-parameter space, can be used for controlling legged robots and neuroprosthetic devices.

We study the dynamic control of ongoing loco-motor patterns through the application of discrete pulses of electrical stimulation to the central pattern generator (CPG) for locomotion. Data is presented from a hardware model of the CPG demonstrating that stimulation causes brief deviations from the CPG's limit cycle activity. It has been shown that the characteristics of the deviation depend strongly on the phase of stimulation. This paper expands upon those previous results in two ways. Firstly, we provide a more detailed characterization of the limit cycle oscillators (LCOs) with the intent of resolving possible asymmetries. Secondly, we use sensory information from a biped robot's "limbs" to set the appropriate timing for the discrete pulse to correct the asymmetries, making it possible to take the computer out of the loop in the generation of the stimulus. Eventually, we believe this approach could lead to development of a neuroprosthetic device for restoring locomotion after paralysis or amputation.

A new central pattern generator chip with 24 silicon neurons and reprogrammable connectivity is presented. The 3mm /spl times/ 3mm chip fabricated in a 3M2P 0.5/spl mu/m process contains 1032 synapses, each with multiple floating gates for storing parameters governing synaptic strength and polarity. Every neuron includes a dendritic compartment with 12 externally-addressable synaptic inputs and 24 recurrent synaptic inputs, enabling construction of a fully-interconnected network with sensory feedback from off-chip elements. In addition to describing the chip architecture and neuron circuits, preliminary results from single oscillating neurons and pairs of phase-locked neurons are shown. This work represents the realization of a design presented at ISCAS'05, and an improvement over our 2nd generation CPG chip presented at ISCAS'04.

We describe in detail the behavior of an inhibitory Central Pattern Generator (CPG) network for robot control. A four-neuron, mutual inhibitory network forms the basic coordinating pattern for locomotion. This network then inhibits an eight-neuron network used to drive patterned movement. We show that we can get predictable control of important relationships such as the phase of the hip and the knee by adjusting tonic parameters. We demonstrate the basic concept both in a simulation that is used to drive a trotting bipedal robot as well as an aVLSI CPG chip that generates spiking burst patterns. Our results indicate that an inhibitory framework can generate simple, understandable and flexible networks for legged robot control that can be implemented in custom VLSI circuits.

We have constructed a second generation CPG chip capable of generating the necessary timing to control the leg of a walking machine. We demonstrate improvements over a previous chip by moving toward a significantly more versatile device. This includes a larger number of silicon neurons, more sophisticated neurons including voltage dependent charging and relative and absolute refractory periods, and enhanced programmability of neural networks. This chip builds on the basic results achieved on a previous chip and expands its versatility to get closer to a self-contained locomotion controller for walking robots. 1

Address-event representation (AER), originally proposed as a means to communicate sparse neural events between neuromorphic chips, has proven efficient in implementing large-scale networks with arbitrary, configurable synaptic connectivity. In this work, we further extend the functionality of AER to implement arbitrary, configurable synaptic plas- ticity in the address domain. As proof of concept, we implement a bi- ologically inspired form of spike timing-dependent plasticity (STDP) based on relative timing of events in an AER framework. Experimen- tal results from an analog VLSI integrate-and-fire network demonstrate address domain learning in a task that requires neurons to group corre- lated inputs.