Demo Data from EDBT 2026 / reviewers in the wild / expert
Shane Swenson
dblp:06/2976
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2002
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 50% Processor architecture and microarchitecture · 50% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization
instruction scheduling |
0.0 | 1 | 2002 | Convergent scheduling · MICRO 2002 |
Processor architecture and microarchitecture › clustered architecture
cluster assignment |
0.0 | 1 | 2002 | Convergent scheduling · MICRO 2002 |
Hardware accelerators and domain-specific architectures
spatial architecture |
0.0 | 1 | 2002 | Convergent scheduling · MICRO 2002 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2002 | Convergent schedulingabstractConvergent scheduling is a general framework for cluster assignment and instruction scheduling on spatial architectures. A convergent scheduler is composed of independent passes, each implementing a heuristic that addresses a particular problem or constraint. The passes share a simple, common interface that provides spatial and temporal preference for each instruction. Preferences are not absolute; instead, the interface allows a pass to express the confidence of its preferences, as well as preferences for multiple space and time slots. A pass operates by modifying these preferences. By applying a series of passes that address all the relevant constraints, the convergent scheduler can produce a schedule that satisfies all the important constraints. Because all passes are independent and need to understand only one interface to interact with each other, convergent scheduling simplifies the problem of handling multiple constraints and co-developing different heuristics. We have applied convergent scheduling to two spatial architectures: the Raw processor and a clustered VLIW machine. It is able to successfully handle traditional constraints such as parallelism, load balancing, and communication minimization, as well as constraints due to preplaced instructions, which are instructions with predetermined cluster assignment. Convergent scheduling is able to obtain an average performance improvement of 21% over the existing space-time scheduler of the Raw processor, and an improvement of 14% over state-of-the-art assignment and scheduling techniques on a clustered VLIW architecture. Walter Lee, Diego Puppin, Shane Swenson, Saman P. Amarasinghe |
MICRO | 3 |