Demo Data from EDBT 2026 / reviewers in the wild / expert
Xiaokang Yang 0004
dblp:06/3071-4
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2024
0009-0001-7486-0471ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 75% Memory systems · 25% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures
machine learning accelerator |
0.8 | 1 | 2024 | ReHarvest: An ADC Resource-Harvesting Crossbar Architecture for ReRAM-Based DNN Accelerators · ACM Trans. Archit. Code Optim. 2024 |
Hardware accelerators and domain-specific architectures
matrix-vector multiplication |
0.8 | 1 | 2024 | ReHarvest: An ADC Resource-Harvesting Crossbar Architecture for ReRAM-Based DNN Accelerators · ACM Trans. Archit. Code Optim. 2024 |
Memory systems
processing-in-memory |
0.8 | 1 | 2024 | ReHarvest: An ADC Resource-Harvesting Crossbar Architecture for ReRAM-Based DNN Accelerators · ACM Trans. Archit. Code Optim. 2024 |
Hardware accelerators and domain-specific architectures › machine learning accelerator › DNN accelerator
ReRAM-based DNN accelerator |
0.8 | 1 | 2024 | ReHarvest: An ADC Resource-Harvesting Crossbar Architecture for ReRAM-Based DNN Accelerators · ACM Trans. Archit. Code Optim. 2024 |
Methods — techniques the papers use, named apart from their topics
multicast · 0.8multi-tile matrix mapping · 0.8many-to-many mapping · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | ReHarvest: An ADC Resource-Harvesting Crossbar Architecture for ReRAM-Based DNN AcceleratorsabstractReRAM-based Processing-In-Memory (PIM) architectures have been increasingly explored to accelerate various Deep Neural Network (DNN) applications because they can achieve extremely high performance and energy-efficiency for in-situ analog Matrix-Vector Multiplication (MVM) operations. However, since ReRAM crossbar arrays’ peripheral circuits– analog-to-digital converters (ADCs) often feature high latency and low area efficiency, AD conversion has become a performance bottleneck of in-situ analog MVMs. Moreover, since each crossbar array is tightly coupled with very limited ADCs in current ReRAM-based PIM architectures, the scarce ADC resource is often underutilized. In this article, we propose ReHarvest, an ADC-crossbar decoupled architecture to improve the utilization of ADC resource. Particularly, we design a many-to-many mapping structure between crossbars and ADCs to share all ADCs in a tile as a resource pool, and thus one crossbar array can harvest much more ADCs to parallelize the AD conversion for each MVM operation. Moreover, we propose a multi-tile matrix mapping (MTMM) scheme to further improve the ADC utilization across multiple tiles by enhancing data parallelism. To support fine-grained data dispatching for the MTMM, we also design a bus-based interconnection network to multicast input vectors among multiple tiles, and thus eliminate data redundancy and potential network congestion during multicasting. Extensive experimental results show that ReHarvest can improve the ADC utilization by 3.2×, and achieve 3.5× performance speedup while reducing the ReRAM resource consumption by 3.1× on average compared with the state-of-the-art PIM architecture–FORMS. Haikun Liu, Zhuohui Duan, Xiaofei Liao, Hai Jin 0001, Xiaokang Yang 0004, Huize Li, Cong Liu 0028, Fubing Mao, Yu Zhang 0027 |
ACM Trans. Archit. Code Optim. | 6 |