Article Free Access Share on Efficient capacitance computation for structures with non-uniform adaptive surface meshes Authors: Vikram Jandhyala Ansoft Corporation, Four Station Square, Pittsburgh, PA Ansoft Corporation, Four Station Square, Pittsburgh, PAView Profile , Scott Savage Ansoft Corporation, Four Station Square, Pittsburgh, PA Ansoft Corporation, Four Station Square, Pittsburgh, PAView Profile , Eric Bracken Ansoft Corporation, Four Station Square, Pittsburgh, PA Ansoft Corporation, Four Station Square, Pittsburgh, PAView Profile , Zoltan Cendes Ansoft Corporation, Four Station Square, Pittsburgh, PA Ansoft Corporation, Four Station Square, Pittsburgh, PAView Profile Authors Info & Claims DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation ConferenceJune 1999 Pages 543–548https://doi.org/10.1145/309847.309995Published:01 June 1999Publication History 1citation256DownloadsMetricsTotal Citations1Total Downloads256Last 12 Months6Last 6 weeks4 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

Finite element techniques are presented for determining the capacitance of three-dimensional interconnection structures. Results are presented for two typical intergrated circuits packages: the plastic leaded chip carrier (PLCC) and the dual in-line package (DIP). The symmetry of the capacitance matrix in the package is described and a set of formulas is presented to take advantage of this symmetry in capacitance calculation. This leads to the reduction in CPU time and memory usage and better converged solution.>

SPICE-based interconnection simulation is described for multiple coupled lines and for lines with three-dimensional discont inuit ies.Two-and threedimensional finite element methods are presented for the quasi-TEM analysis of arbitrary interconnection structures.Partial capacitance and partial induct ante values for three-dimensional discontinuities are obtained by defining input and output ports for the discontinuity and deembedding the two-dimensional regions to the plane of the discontinuity.This procedures is highly accurate and reliable and can be used to model arbitrary interconnect geometries.Interconnection circuits are entered via geometric CAD and are meshed and solved automatically by using adaptive mesh generation.Equivalent circuit models of typical 3D interconnects such as bends, vias, T junctions and chip packages are described.Simulations are based on modal decomposition for multiple lines implemented using SPICE.We show that the quasi-TEM analysis and the full wave analysis of a Tjunction are nearly identical up to 10 GHz. 1

The authors present a finite element method for semiconductor device simulation using tangential vector finite element basis functions. Tangential vector basis functions are derived by reference to Whitney forms. In the new formulation, current is approximated by a quadratic polynomial, rather than as a constant within the element as has been done previously; the tangential components of a vector along the mesh edges are expressed in a consistent manner with the other variables, and the weak form of the device equations is integrated exactly. It is shown that this weak form is closely related to the Voronoi cell method and that an artificial diffusion constant may be used to stabilize the solutions. Numerical studies show that the new method is superior to the Scharfetter-Gummel algorithm in cases of obtuse and irregular triangulations. >