Bit-stuffing is the procedure of introducing an extra bit in the transmitted stream after a fixed number of consecutive ones or zeros. This paper demonstrates that, for conventional unstuffing, the BER experienced by individual bits within a stuffed frame dramatically and monotonically degrades with its positional-index. We also show that when knowledge of the number of stuffed bits is applied to maximum a posteriori (MAP) bit-unstuffing (MAPBU) (through a BCJR algorithm), this trend is significantly mitigated.

Bit-stuffing is used in various communications protocols, typically as a way to remove ambiguity in the detection of control flags or as a method to aid clock recovery. Typically a demodulator makes hard symbol-by-symbol decisions without incorporating the knowledge that the data source is bit-stuffed. A demodulator making symbol-by-symbol decisions is clearly not optimum for a source that has been bit-stuffed. In this paper we investigate an optimum approach. We develop the maximum-likelihood sequence detector (MLSD) for a bit-stuffed data source. We start by modeling the transmitted signal as a Markov process. We then proceed to calculate approximate performance bounds for the MLSD. We then develop a trellis receiver structure and perform simulations using the Viterbi decoder algorithm.

Profile data is valuable for identifying performance bottlenecks and guiding optimizations. Periodic sampling of a processor's performance monitoring hardware is an effective, unobtrusive way to obtain detailed profiles. Unfortunately, existing hardware simply counts events, such as cache misses and branch mispredictions, and cannot accurately attribute these events to instructions, especially on out-of-order machines. We propose an alternative approach, called ProfileMe, that samples instructions. As a sampled instruction moves through the processor pipeline, a detailed record of all interesting events and pipeline stage latencies is collected. ProfileMe also supports paired sampling, which captures information about the interactions between concurrent instructions, revealing information about useful concurrency and the utilization of various pipeline stages while an instruction is in flight. We describe an inexpensive hardware implementation of ProfileMe, outline a variety of software techniques to extract useful profile information from the hardware, and explain several ways in which this information can provide valuable feedback for programmers and optimizers.

Monsoon is an experimental multi-threaded multiprocessor targeted to large-scale, general purpose scientific and symbolic computations. In particular, Monsoon is designed for the efficient execution of code compiled from Id, a high-level, implicitly parallel declarative language. Monsoon is a product of a multiyear cooperative research and development program between the Massachusetts Institute of Technology (MIT) and Motorola, Inc., which, in turn is an outgrowth of over ten years of research in dynamic dataflow architectures and languages conducted at MIT. The intent is to provide an overall view of the Monsoon hardware and software system architecture. In addition, the run-time system and emulator are detailed.>