This paper presents a 5G/6G millimeter-wave (mmWave) phased array antenna-power amplifier module that recovers the effective isotropic radiated power (EIRP) during a user’s handgrip in mobile devices. A sentenna device, which combines a capacitive sensor and an antenna to enable both wireless communication and handgrip detection, is designed and utilized to distinguish between antenna elements blocked by a user’s hand and those unblocked within the phased-array system, without using external sensors such as radar sensors. Based on handgrip information from the sentenna devices, current to the front-end circuits of blocked antenna units is cut off and redistributed to those of unblocked units. In the absence of handgrip detection and current redistribution (CR) functions, the measured EIRP of the$1\times 4$phased array sentenna system drops from + 31.4 dBm to + 22.4 dBm when up to three sentenna units are blocked. In contrast, with these functions enabled, the worst-case EIRP degradation is limited to + 27.4 dBm, effectively mitigating up to 5 dB of performance loss. Notably, this EIRP recovery is achieved while also improving the output-referred third-order intercept point (OIP3).

An LC-VCO incorporating differentially pumped varactors for$3^{\mathrm {rd}}$order harmonic generation is demonstrated in a 65-nm bulk CMOS process with an$f_{max}$of ~250 GHz. The differentially pumped N-type Accumulation mode MOS varactor pair acting as a symmetric varactor serves as a frequency tuning element, as well as the non-linear reactive elements for harmonic generation. The measurements show that the circuit has a peak radiated power of -15.2 dBm with a frequency tuning range between 361.4 to 383.3 GHz or 5.9 %, and a peak DC-THz efficiency of 0.102 %. Among the CMOS oscillator signal generators with an on-chip antenna and output frequency greater than 300 GHz, the circuit exhibits the state-of-the-art DC-THz efficiency.

This paper presents the first Research Experience for Teachers (RET) site in the United States on integrated circuit (IC) design and education for high school and community college teachers. Motivated by the enormous upcoming semiconductor workforce demand spurred by investments from the CHIPS and Science Act, we offered a six-week paid RET program for ten teachers in Oklahoma to learn about semiconductors and chip design. Teachers were also required to translate their experience into new curriculum modules. Our training leveraged the web-based Silicon Layout Wizard (Siliwiz), Wowki template, and the Tiny Tapeout flow, all running in a browser using the open-source Skywater 130 nm CMOS process. We also provided curriculum design training so teachers could teach the new materials more effectively. Among the ten participants, six successfully submitted their GDS files for fabrication. Four presented at the 2023 ASEE virtual poster sessions. Evaluation data indicated the challenges teachers initially faced and the enthusiasm they sustained throughout the RET program.