Partitioning memristive crossbar is emerging as a new technique for improving computational throughput, and overcoming trade-offs in memristive Processing-In-Memory (PIM) architecture. This paper presents a complete framework for realizing logic functions inside a partitioned memristive crossbar. This work utilizes a heuristic-based clustering algorithm on And-Inverter-Graphs (AIGs) to minimize the number of lookup tables (LUTs) necessary for mapping Boolean logic functions. In our proposed mapping technique, LUTs are evaluated using single-row Memristor Aided loGIC (MAGIC) based NOR gates, and mapped inside the partitioned memristive crossbar. The peripheral design for partitioned crossbar utilizes a shared CMOS decoder, and generates Opcodes to control logic computation across all partitions. The experimental results show an average throughput improvement of 12.58×, 68.47×, 156.10×, 107.76×, and 506.22× over SIMPLER, ReVAMP-ArC, ReVAMP-DeC, m-AIG based mapping technique, and CoMIC-3D mapping, respectively. In addition, on average, a 47.4% reduction in computation area is observed.