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W. David Pricer

dblp:07/4644 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1976
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 78% Processor architecture and microarchitecture · 12% Memory systems · 10%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design		 0.011976
The Application of Transistor Technology to Computers · IEEE Trans. Computers 1976
Integrated circuit design › semiconductor devices
transistor technology		 0.011976
The Application of Transistor Technology to Computers · IEEE Trans. Computers 1976
Memory systems
delay-line memory		 0.011964
Tunnel Diode Delay-Line Memory · IEEE Trans. Electron. Comput. 1964
Memory systems › memory architecture
serial memory		 0.011964
Tunnel Diode Delay-Line Memory · IEEE Trans. Electron. Comput. 1964

Methods — techniques the papers use, named apart from their topics

technology projection · 0.0simulation · 0.0
YearPublicationVenuePosition
1976 The Application of Transistor Technology to Computers
abstract
The density of integrated circuits has improved in the last 15 years by 4 to 5 orders of magnitude. This paper discusses four primary computer technology areas that have helped bring about this advance and which have significantly changed the nature of computer components: FET logic, FET memory, bipolar logic, and bipolar memory. Projections are made for future trends in these technologies.
Richard A. Henle, Irving T. Ho, William S. Johnson, W. David Pricer, James L. Walsh
 IEEE Trans. Computers4
1964 Tunnel Diode Delay-Line Memory
abstract
This paper describes a memory system wherein bits of information are stored serially in time on electrical delay lines, The simplicity and speed of the basic storage cell makes large high-speed stores of this sort feasible. The paper stresses the basic principles of operation. A brief description of one such system model built to demonstrate these principles is included.
H. H. Harris Jr., W. David Pricer
 IEEE Trans. Electron. Comput.2