Andrea Miele

dblp:07/8338 · DBLP profile ↗
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8ranked-venue papers
4as first author
2since 2021 · last 2025
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 4 · 3 first-authorSystems, architecture and hardware · 2Artificial intelligence and machine learning · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Artificial intelligence
1 paper
Reinforcement learning · 50% Representation and self-supervised learning · 25% Deep learning architectures and training · 25%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Hardware accelerators and domain-specific architectures · 90% GPUs and heterogeneous computing · 10%
Network and information security
2 papers
Cryptographic primitives and cryptanalysis · 100%

Topics — the 9 heaviest of 10, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Machine learning › Deep learning architectures and training › training dynamics
plasticity loss
0.812024
No Representation, No Trust: Connecting Representation, Collapse, and Trust Issues in PPO · NeurIPS 2024
Machine learning › Reinforcement learning
policy optimization
0.812024
No Representation, No Trust: Connecting Representation, Collapse, and Trust Issues in PPO · NeurIPS 2024
Machine learning › Reinforcement learning › policy optimization
proximal policy optimization
0.812024
No Representation, No Trust: Connecting Representation, Collapse, and Trust Issues in PPO · NeurIPS 2024
Machine learning › Representation and self-supervised learning › representation analysis
representation collapse
0.812024
No Representation, No Trust: Connecting Representation, Collapse, and Trust Issues in PPO · NeurIPS 2024
Cryptographic primitives and cryptanalysis › public-key cryptography
elliptic curve cryptography
0.212016
Four ℚ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields · CHES 2016
Hardware accelerators and domain-specific architectures
cryptographic accelerator
0.212016
Four ℚ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields · CHES 2016
Hardware accelerators and domain-specific architectures › cryptographic accelerator
elliptic curve cryptography hardware
0.212016
Four ℚ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields · CHES 2016
Cryptographic primitives and cryptanalysis
integer factorization
0.212014
Cofactorization on Graphics Processing Units · CHES 2014
GPUs and heterogeneous computing
GPU computing
0.112014
Cofactorization on Graphics Processing Units · CHES 2014

Methods — techniques the papers use, named apart from their topics

trust region regularization · 0.8auxiliary loss · 0.8GPU acceleration · 0.4
YearPublicationVenuePosition
2025 A Distributed Framework for Integrated Task Allocation and Safe Coordination in Networked Multi-Robot Systems
abstract
Deploying a team of autonomous robots, operating collaboratively towards a common objective within dynamic environments, has the potential to improve the system efficiency across several fields. This paper proposes a distributed comprehensive framework enabling a networked multi-robot system to serve time-varying requests arising from different locations within the environment in a distributed and safe manner, i.e., by guaranteeing no collisions with possible obstacles and preserving connectivity among the robots. To this aim, a two-layer architecture is proposed where the top layer is in charge of distributively assigning new service requests to the robots by resorting to an auction-based algorithm, while the bottom layer is in charge of safely navigating the environment to serve the assigned requests by relying on Control Barrier Functions. However, the presence of connectivity constraints might affect the number of service requests that the multi-robot system can handle simultaneously and might lead to deadlock situations where robots cannot reach the designated locations due to loss of network connectivity. Hence, a distributed strategy based on consensus algorithms to detect and solve deadlocks in a distributed fashion is proposed. The completeness of the approach is proved. Simulation results in an agricultural setting and real-world laboratory experiments are provided to validate the effectiveness of the proposed approach.Note to Practitioners—This paper was inspired by the necessity to coordinate a team of robots to perform tasks within an unstructured agricultural field, including both the decision-making and navigation strategies, with no central control unit as envisioned by the European project CANOPIES. To this aim, a distributed approach is designed where robots only rely on local data and information from neighboring robots to assign and execute tasks effectively in a coordinated manner. In addition, as working under local communication constraints may prevent parallel execution of all tasks, potentially leading to deadlock situations, a distributed strategy is developed to enable each robot to detect and solve such situations. The proposed approach can be employed in several domains where the cooperation of multiple autonomous robots might be beneficial, ranging from logistics settings to search and rescue scenarios up to agricultural environments. Laboratory experiments with three robots demonstrate the effectiveness of the approach.
Andrea Miele, Martina Lippi, Andrea Gasparri
IEEE Trans Autom. Sci. Eng.1
2024 No Representation, No Trust: Connecting Representation, Collapse, and Trust Issues in PPO
abstract
Reinforcement learning (RL) is inherently rife with non-stationarity since the states and rewards the agent observes during training depend on its changing policy. Therefore, networks in deep RL must be capable of adapting to new observations and fitting new targets. However, previous works have observed that networks trained under non-stationarity exhibit an inability to continue learning, termed loss of plasticity, and eventually a collapse in performance. For off-policy deep value-based RL methods, this phenomenon has been correlated with a decrease in representation rank and the ability to fit random targets, termed capacity loss. Although this correlation has generally been attributed to neural network learning under non-stationarity, the connection to representation dynamics has not been carefully studied in on-policy policy optimization methods. In this work, we empirically study representation dynamics in Proximal Policy Optimization (PPO) on the Atari and MuJoCo environments, revealing that PPO agents are also affected by feature rank deterioration and capacity loss. We show that this is aggravated by stronger non-stationarity, ultimately driving the actor's performance to collapse, regardless of the performance of the critic. We ask why the trust region, specific to methods like PPO, cannot alleviate or prevent the collapse and find a connection between representation collapse and the degradation of the trust region, one exacerbating the other. Finally, we present Proximal Feature Optimization (PFO), a novel auxiliary loss that, along with other interventions, shows that regularizing the representation dynamics mitigates the performance collapse of PPO agents. Code and run histories are available at https://github.com/CLAIRE-Labo/no-representation-no-trust.
Skander Moalla, Andrea Miele, Daniil Pyatko, Razvan Pascanu, Caglar Gulcehre
NeurIPS2
2018 Efficient many-core architecture design for cryptanalytic collision search on FPGAs
Andrea Miele, Marco Indaco, Fabio Lauri, Pascal Trotta
J. Inf. Secur. Appl.1
2016 Four ℚ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields
Kimmo Järvinen 0001, Andrea Miele, Reza Azarderakhsh, Patrick Longa
CHES2
2015 An efficient many-core architecture for Elliptic Curve Cryptography security assessment
abstract
Elliptic Curve Cryptography (ECC) is a popular tool to construct public-key crypto-systems. The security of ECC is based on the hardness of the elliptic curve discrete logarithm problem (ECDLP). Implementing and analyzing the performance of the best known methods to solve the ECDLP is useful to assess the security of ECC and choose security parameters in practice. We present a novel many-core hardware architecture implementing the parallel version of Pollard's rho algorithm to solve the ECDLP. This architecture results in a speed-up of almost 300% compared to the state of the art and we use it to estimate the monetary cost of solving the Certicom ECCp-131 challenge using FPGAs.
Marco Indaco, Fabio Lauri, Andrea Miele, Pascal Trotta
FPL3
2015 Efficient Ephemeral Elliptic Curve Cryptographic Keys
Andrea Miele, Arjen K. Lenstra
ISC1
2014 Cofactorization on Graphics Processing Units
Andrea Miele, Joppe W. Bos, Thorsten Kleinjung, Arjen K. Lenstra
CHES1
2010 Microprocessor fault-tolerance via on-the-fly partial reconfiguration
abstract
This paper presents a novel approach to exploit FPGA dynamic partial reconfiguration to improve the fault tolerance of complex microprocessor-based systems, with no need to statically reserve area to host redundant components. The proposed method not only improves the survivability of the system by allowing the online replacement of defective key parts of the processor, but also provides performance graceful degradation by executing in software the tasks that were executed in hardware before a fault and the subsequent reconfiguration happened. The advantage of the proposed approach is that thanks to a hardware hypervisor, the CPU is totally unaware of the reconfiguration happening in real-time, and there's no dependency on the CPU to perform it. As proof of concept a design using this idea has been developed, using the LEON3 open-source processor, synthesized on a Virtex 4 FPGA.
Stefano Di Carlo, Andrea Miele, Paolo Prinetto, Antonio Trapanese
ETS2