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Christopher Kingsley

dblp:08/1603 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 83% Hardware reliability and fault tolerance · 17%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
compiler construction		 0.011987
The Implementation of a State Machine Compiler · DAC 1987
Electronic design automation › logic synthesis
finite state machine synthesis		 0.011987
The Implementation of a State Machine Compiler · DAC 1987
Electronic design automation
logic synthesis		 0.011987
The Implementation of a State Machine Compiler · DAC 1987
Hardware reliability and fault tolerance › fault-tolerant design
error-tolerant design		 0.011984
A hiererachical, error-tolerant compactor · DAC 1984
Electronic design automation
hardware verification and test		 0.011984
A hiererachical, error-tolerant compactor · DAC 1984
Electronic design automation › hardware verification and test
test response compaction		 0.011984
A hiererachical, error-tolerant compactor · DAC 1984
YearPublicationVenuePosition
1987 The Implementation of a State Machine Compiler
abstract
This paper describes VTIstate, VLSI Technology's state machine compiler. The compiler derives combinational logic and registers to make a state machine, and synthesizes the combinational logic with three optimization steps. The 1986 Design Automation conference synthesis benchmark set is used to compare the results with previously reported logic synthesis programs.
Christopher Kingsley
 DAC1
1984 A hiererachical, error-tolerant compactor
Christopher Kingsley
 DAC1