A methodology is investigated to optimize technological parameters to reduce distribution of circuit performance. Major attention is paid to treat all characteristics from device level to circuit level on one basis, namely technological parameters. The key point of the whole procedure is the quality of the analytical MOSFET model used for circuit simulations. Due to the physical description of our model, only three independent technological parameters have to be studied, namely the effective channel length, the oxide thickness, and the substrate doping concentration. These values are available directly or indirectly from measurements. The methodology is applied to optimize the oxide thickness for a 23-stage ring oscillator to obtain narrow delay distribution for low voltage application.

In this paper, we describe a complete MOSFET model developed for circuit simulation based on fully consistent physical concept. The model describes all transistor characteristics as a function of surface potentials, which are calculated iteratively at each applied voltage under the charge-sheet approximation. The key idea of this development is to put as much physics as possible into the equations describing the surface potentials. Since the model includes both the drift and the diffusion contributions, a single equation is valid from the subthreshold to the saturation regions. Contrary to the expectation, the results show that our semi-implicit model including the iteration procedures can even reduce the CPU time significantly in comparison with a conventional model similar to BSIM2 including short-channel effects. This is due to the consistent description of the model equations for all transistor characteristics, which results in more straightforward device equations, once the surface potentials have been computed.

Tsividis and Suyama (1994) have given benchmark circuits to assess model quality for analog applications. They are mainly based on the drain current quality check. We propose here benchmark circuits with respect to capacitances and charges. The most serious failure of existing models is related to the charge partitioning to the source and the drain side. The influence of the failure on real applications will be demonstrated.

The reliability of CAD is dependent on the accuracy of models implemented into circuit simulators. However, precise models such as based on 2D numerical modeling are time consuming. Therefore, simplified analytical models have been developed and widely used. A problem is that such existing models are not valid for advanced MOSFETs with sub-micron channel length due to applied simplifications. By introducing fitting parameters to describe each additional short-channel phenomenon, the consistency of the models is violated. As a result the calculation time for circuit simulation increases considerably. In this paper the authors present a newly developed MOSFET model which describes the transistor characteristics consistently without any nonphysical fitting parameters. Using this model the calculation time is reduced in comparison with the conventional model due to the consistent inclusion of short-channel effects and the diffusion contribution to the carrier transport.>