The PI3K/AKT signaling pathway plays a role in most cellular functions linked to cancer progression, including cell growth, proliferation, cell survival, tissue invasion and angiogenesis. It is generally recognized that hyperactive PI3K/AKT1 are oncogenic due to their boost to cell survival, cell cycle entry and growth-promoting metabolism. That said, the dynamics of PI3K and AKT1 during cell cycle progression are highly nonlinear. In addition to negative feedback that curtails their activity, protein expression of PI3K subunits has been shown to oscillate in dividing cells. The low-PI3K/low-AKT1 phase of these oscillations is required for cytokinesis, indicating that oncogenic PI3K may directly contribute to genome duplication. To explore this, we construct a Boolean model of growth factor signaling that can reproduce PI3K oscillations and link them to cell cycle progression and apoptosis. The resulting modular model reproduces hyperactive PI3K-driven cytokinesis failure and genome duplication and predicts the molecular drivers responsible for these failures by linking hyperactive PI3K to mis-regulation of Polo-like kinase 1 (Plk1) expression late in G2. To do this, our model captures the role of Plk1 in cell cycle progression and accurately reproduces multiple effects of its loss: G2 arrest, mitotic catastrophe, chromosome mis-segregation / aneuploidy due to premature anaphase, and cytokinesis failure leading to genome duplication, depending on the timing of Plk1 inhibition along the cell cycle. Finally, we offer testable predictions on the molecular drivers of PI3K oscillations, the timing of these oscillations with respect to division, and the role of altered Plk1 and FoxO activity in genome-level defects caused by hyperactive PI3K. Our model is an important starting point for the predictive modeling of cell fate decisions that include AKT1-driven senescence, as well as the non-intuitive effects of drugs that interfere with mitosis.

To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time enabling fast instruction issue logic. Many solutions exist to the scheduling problem, ranging from compile-time to run-time approaches. Compile-time solutions feature fast and simple hardware, but at the expense of conservative schedules. Dynamic schedulers produce high-quality schedules that incorporate run-time information and dependence speculation, but implementing these schedulers requires complex circuits that can slow processor clock speeds. We present the Cyclone scheduler, a novel design that captures the benefits of both compile-and run-time scheduling. Our approach utilizes a list-based single-pass instruction scheduling algorithm, implemented by hardware at run-time in the front end of the processor pipeline. Once scheduled, instructions are injected into a timed queue that orchestrates their entry into execution. To accommodate branch and load/store dependence speculation, the Cyclone scheduler supports a simple selective replay mechanism. We implement this technique by overloading instruction register forwarding to also detect instructions dependent on incorrectly scheduled operations. Detailed simulation analyses suggest that with sufficient queue width, the Cyclone scheduler can rival the instruction throughput of similarly wide monolithic dynamic schedulers. Furthermore, the circuit complexity of the Cyclone scheduler is much more favorable than a broadcast-based scheduler, as our approach requires no global control signals.