In order to handle mixed criticality flows in a realtime embedded network, switched Ethernet with Quality of Service (QoS) facilities has become a popular solution. Deficit Round Robin (DRR) is such a QoS facility. Worst-Case Traversal Time (WCTT) analysis is mandatory for such systems, in order to ensure that end-to-end delay constraints are met. Network Calculus is a classical approach to achieve this WCTT analysis. A solution has been proposed for switched Ethernet with DRR. It computes pessimistic upper bounds on end-to-end latencies. This pessimism is partly due to the fact that the scheduling of flows by end systems is not considered in the analysis. This scheduling can be modeled by offsets between flows. This modeling has been integrated in WCTT analysis of switched Ethernet with First In First Out (FIFO) scheduling. It leads to a significant reduction of delay upper bounds. The contribution of this paper is to integrate the offsets in the WCTT analysis for switched Ethernet with DRR and to evaluate the reduction on delay upper bounds, considering a realistic case study.

Avionics Full Duplex switched Ethernet (AFDX) is the de facto standard for the transmission of critical avionics flows. It is a specific switched Ethernet solution based on First-in First-out (FIFO) scheduling. Worst-case traversal time (WCTT) analysis is mandatory for such flows, since timing constraints have to be guaranteed. A classical approach in this context is Network Calculus (NC). However, NC introduces some pessimism in the WCTT computation. Moreover, the worst-case often corresponds to very rare scenarios. Thus, the network architecture is most of the time lightly loaded. Typically, less than 10 % of the available bandwidth is used for the transmission of avionics lows on an AFDX network embedded in an aircraft. One solution to improve the utilization of the network is to introduce Quality of Service (QoS) mechanisms. Deficit Round Robin (DRR) is such a mechanism and it is envisioned for future avionics networks. A WCTT analysis has been proposed for DRR. It is based on NC. It doesn't make any assumption on the scheduling of flows by end systems. The first contribution of this paper is to identify sources of pessimism of this approach and to propose an improved solution which removes part of this pessimism. The second contribution is to show how the scheduling of flows can be integrated in this optimized DRR approach, thanks to offsets. An evaluation on a realistic case study shows that both contributions bring significantly tighter bounds on worst-case latencies.

In this paper, we consider the problem of guaranteeing real-time end-to-end transmission time for flows sent on a Network-on-Chip (NoC) with First-in First-out (FIFO) scheduling on each node. We show how to adapt the Trajectory approach, used in the context of Avionics Full DupleX switched Ethernet (AFDX) networks to characterize end-to-end transmission delays, to the context of NoC-based Systems-on-Chip (SoCs). We characterize the benefit of the Trajectory approach on an example.

We consider the problem of dimensioning real-time AFDX FIFO networks with a worst-case end-to-end delay analysis. The state-of-the-art has considered several approaches to compute these worst-case end-to-end delays. Among them, the Trajectory approach has received more attention as it has been shown to provide tight end-to-end delay upper bounds. Recently, it has been proved that current Trajectory analysis can be optimistic for some corner cases, leading in its current form, to certification issues. In this paper, we first characterize the source of optimism in the Trajectory approach on detailed examples. Then, we provide a correction to the identified problems. Two problems are solved: the first one is on the root cause of the underestimated time interval to compute delays of competing flows and a problem in the definition of the end-to-end delay computation. The second one is on the way that serialized frames are taken into account in the worst-case delay analysis.

AFDX (Avionics Full Duplex Switched Ethernet) standardized as ARINC 664 is a major upgrade for avionics systems. The mandatory certification implies a worst-case delay analysis of all the flows transmitted on the AFDX network. Up to now, this analysis is done thanks to a tool based on the Network Calculus approach. This existing approach considers that all the flows transmitted on the network are asynchronous and it does not take into account the scheduling of output flows done by each end system. The main contribution of this paper is to extend the existing Network Calculus approach by introducing the offsets associated to the different periodic flows into the computation. The resulting approach is evaluated on an industrial AFDX configuration with an existing offset assignment algorithm. The obtained upper bounds are significantly reduced.