This paper analyzes energy consumption in wireless streaming with delay constraints. One fundamental question is whether the transmitter should transmit a steady stream of bits, continuous transmission, or transmit data in bursts and switch off while not transmitting. In the latter case, a question is also for what fraction of time the transmitter should transmit, the duty cycle. In this paper we use traditional and finite blocklength information theory to see whether bursty transmission would be better than transmitting data continuously. When doing this analysis we consider latency and energy efficiency, two fundamental parameters that characterize communication systems. We take into account realistic models of hardware, including overhead power, power amplifier inefficiency and the receiver noise factor. With these models we find that the energy consumption and latency tradeoff behaves quite differently from the ideal case.

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In this paper we propose a high resolution digital calibration method for analog/RF circuits that is an extension of the statistical element selection (SES) approach. As compared to SES, the proposed ESES method provides wider calibration range to accommodate multiple variation sources and produces higher calibration yield for the same calibration resolution target. Two types of ESES-based calibration with application in analog/RF designs are demonstrated; current source calibration and phase/delay calibration. As compared to traditional calibration methods, the proposed ESES-based calibration incurs lower circuit overhead while achieving higher calibration resolution. ESES calibration is further applied to a wideband harmonic-rejection receiver design that achieves best-in-class harmonic-rejection performance after calibration.

Issues associated with the integration of transceiver components on to a single silicon substrate are discussed. In particular, recently proposed receiver and transmitter architectures for high integration are examined on the promise of providing multistandard capability. In addition, existing barriers to lower power transceiver operation are examined as well as some proposed directions for future integrated transceiver research and development.