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Donald A. Lobo

dblp:09/2794 · DBLP profile ↗
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3ranked-venue papers
1as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Electronic design automation · 80% Performance modeling and evaluation · 20%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 5 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
high-level synthesis
0.031992
Control Optimization in High-Level Synthesis Using Behavioral Don't Cares · DAC 1992
Relevant Issues in High-Level Connectivity Synthesis · DAC 1991
Redundant Operator Creation: A Scheduling Optimization Technique · DAC 1991
Performance modeling and evaluation
scheduling optimization
0.011991
Redundant Operator Creation: A Scheduling Optimization Technique · DAC 1991
Electronic design automation
physical design
0.011991
Relevant Issues in High-Level Connectivity Synthesis · DAC 1991
Electronic design automation › physical design
placement and routing
0.011991
Relevant Issues in High-Level Connectivity Synthesis · DAC 1991
Electronic design automation › high-level synthesis
scheduling
0.011991
Relevant Issues in High-Level Connectivity Synthesis · DAC 1991

Methods — techniques the papers use, named apart from their topics

redundant operator creation · 0.0behavioral don't cares · 0.0design experiments · 0.0
YearPublicationVenuePosition
1992 Control Optimization in High-Level Synthesis Using Behavioral Don't Cares
Reinaldo A. Bergamaschi, Donald A. Lobo, Andreas Kuehlmann
DAC2
1991 Redundant Operator Creation: A Scheduling Optimization Technique
abstract
A method is proposed for optimizing a Control I Data Flow Graph (CDFG), to generate shorter schedules, given a freed number of functional units.A counter-intuitive approach is taken of adding more operations to the CDFG to reduce the number of cycles in the final schedule.In this paper, this technique is applied to individual straight-line code sections (stateblocks) to reduce their execution times (as opposed to recently published methods for optim"zations that transcend state block boundaries).In many cases this technique has produced schedules significantly better (up to 30$%0) than those previously published.The algorithm rearranges the CDFG, modifjing the syntactical structure, while preserving the semantic meaning.The focus of attack is on the critical path, where most of the transformations are attempted to decrease the length of the critical path and hence the length of the resultant CDFG.The benchmarks were run on a MIPS RC3240 Riscomputer (-18 MIPS) and each schedule was derived at in less than 1 cpu second!
Donald A. Lobo, Barry M. Pangrle
DAC1
1991 Relevant Issues in High-Level Connectivity Synthesis
abstract
This paper addresses relevant issues in connectivity synthesis particularly with respect to other design concerns in high-level behavioral synthesis.A restricted model is used to run a series of design experimerus to provide insight into the relationship between scheduling, conrwctivity, and placement & routing.Contrary to the common approach of counting multiplexer, multiplexer inputs, and busses, this approach looks at more germanz issues, namely: I) How to decide how much a "bus" is really going to cost, 2) How much does "load balanced" scheduling help, especially in the case of resource constrained scheduling, and 3) Should the number of multiplexer inputs really be the main criterion for judging the connectivity quality of the designs?
Barry M. Pangrle, Forrest Brewer, Donald A. Lobo, Andrew Seawright
DAC3