Demo Data from EDBT 2026 / reviewers in the wild / expert
M. Silverberg
dblp:09/5836
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1968
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 50% High-performance computing · 50% | |
| Theoretical computer science
1 paper |
Mathematical optimization · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
circuit simulation |
0.0 | 1 | 1968 | Near-Optimal Ordering of Electronic Circuit Equations · IEEE Trans. Computers 1968 |
High-performance computing › sparse linear algebra
matrix ordering |
0.0 | 1 | 1968 | Near-Optimal Ordering of Electronic Circuit Equations · IEEE Trans. Computers 1968 |
Mathematical optimization
combinatorial optimization |
0.0 | 1 | 1968 | Near-Optimal Ordering of Electronic Circuit Equations · IEEE Trans. Computers 1968 |
Methods — techniques the papers use, named apart from their topics
sparse matrix techniques · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1968 | Near-Optimal Ordering of Electronic Circuit EquationsabstractAbstract—An implementation of an algorithm for near-optimal ordering of sparse network equations is described. Such ordering can result in considerable savings in computer time and may be applied to various types of analysis programs. A sample problem demonstrates a saving in computer time in excess of 50 percent. M. Silverberg |
IEEE Trans. Computers | 1 |