Roberto Palmieri

dblp:09/7950 · DBLP profile ↗
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73ranked-venue papers
3as first author
18since 2021 · last 2026
0000-0002-1530-4088ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 44 · 11 since 2021Security and privacy · 6 · 1 first-author · 2 since 2021Software engineering, systems software and programming languages · 4 · 2 since 2021Theory of computation · 3Computer networks · 1 · 1 since 2021
YearPublicationVenuePosition
2026 Brief Announcement: QPID: A Scalable, Strict Concurrent Priority Queue
abstract
This work challenges the perceived tradeoff between strict semantics and scalable performance in priority schedulers. We break down and analyze the use of relaxation in existing priority queue designs, aiming to show that by tailoring the design to workload characteristics, priority queues can retain strong semantics while achieving competitive scalability. In fact, many widely used applications of priority queues exhibit workloads with common characteristics: the number of distinct priorities is few relative to the number of jobs, and insertions tend to be low-priority. We use these observations to design QPID, a strict, concurrent priority queue. Our experimental results show that QPID scales nearly as well as the best relaxed competitor and outperforms all other strict and relaxed competitors in most cases.
Olivia Grimes, Matthew Rodriguez, Michael F. Spear, Roberto Palmieri
SPAA5
2025 Pineapple: Unifying Multi-Paxos and Atomic Shared Registers
Tigran Bantikyan, Jonathan Zarnstorff, Te-Yen Chou, Lewis Tseng, Roberto Palmieri
NSDI5
2025 On Designing High-Performance Distributed Shared Memory Systems with RDMA
abstract
Remote Direct Memory Access (RDMA) has emerged as a critical networking technology in modern data centers, promising high throughput and ultra-low latencies, in addition to sparing vital CPU and kernel resources. Despite its bright promises, programming efficiently with RDMA, particularly when using one-sided communication, presents numerous challenges. To further exacerbate the issue, workloads with different characteristics behave differently under various RDMA configurations, making it impossible to provide an optimized one-size-fits-all solution. In this practical experience report, we present a comprehensive analysis of one-sided programming with RDMA and its implications. We gather lessons from our experience developing distributed, large-scale applications in industry and academia, and outline the main RDMA challenges we have faced. Along the way, we devise a set of guidelines for programmers who want to take advantage of the benefits of RDMA but might not be aware of its pitfalls related to the complex hardware and protocol structure that it encompasses.
Amanda Baran, Roberto Palmieri
SRDS2
2025 PIPQ: Strict Insert-Optimized Concurrent Priority Queue
Olivia Grimes, Panagiota Fatourou, Roberto Palmieri
DISC4
2024 POSTER: OCToPus: Semantic-aware Concurrency Control for Blockchain Transactions
abstract
Many blockchain implementations offer APIs to send and receive money between accounts exclusively. In this paper, we introduce OCToPus, a deterministic concurrency control scheme that uses a semantic-aware fast path and a GPU-accelerated directed acyclic graph-based fallback path to parallelize the execution of a block aggressively.
dePaul Miller, Henry F. Korth, Roberto Palmieri
PPoPP3
2024 ALock: Asymmetric Lock Primitive for RDMA Systems
abstract
Remote direct memory access (RDMA) networks are being rapidly adopted into industry for their high speed, low latency, and reduced CPU overheads compared to traditional kernel-based TCP/IP networks. RDMA enables threads to access remote memory without interacting with another process. However, atomicity between local accesses and remote accesses is not guaranteed by the technology, hence complicating synchronization significantly. The current solution is to require threads wanting to access local memory in an RDMA-accessible region to pass through the RDMA card using a mechanism known as loopback, but this can quickly degrade performance. In this paper, we introduce ALock, a novel locking primitive designed for RDMA-based systems. ALock allows programmers to synchronize local and remote accesses without using loopback or remote procedure calls (RPCs). We draw inspiration from the classic Peterson's algorithm to create a hierarchical design that includes embedded MCS locks for two cohorts, remote and local. To evaluate the ALock we implement a distributed lock table, measuring throughput and latency in various cluster configurations and workloads. In workloads with a majority of local operations, the ALock outperforms competitors up to 29x and achieves a latency up to 20x faster.
Amanda Baran, Jacob Nelson-Slivon, Lewis Tseng, Roberto Palmieri
SPAA4
2024 Brief Announcement: LIT: Lookup Interlocked Table for Range Queries
abstract
We introduce the Lookup Interlocked Table (LIT), a highly efficient data structure that facilitates get, update, and range query operations. LIT is designed to maintain the high performance of hashing algorithms while also preserving the order of data for range queries. It does that by utilizing an order-preserving lookup function to index data and providing the option to split and resize the indexing to adapt to changing workloads.
dePaul Miller, Roberto Palmieri
SPAA3
2024 Brief Announcement: ROMe: Wait-free Objects for RDMA
abstract
Ensuring data consistency under remote direct memory access (RDMA) is challenging due to the combined effects of various hardware components. This brief announcement introduces remote object memory (ROMe), the first technique to guarantee wait-free consistent reads of arbitrarily sized objects over RDMA without the use of specialized hardware, and while allowing the concurrent execution of conflicting local updates. We integrated ROMe into ROMe-KV, an RDMA-enabled key-value store whose underlying B-link tree nodes are ROMe objects that enable supporting wait-free linearizable range queries.
Jacob Nelson-Slivon, Reilly Yankovich, Roberto Palmieri
SPAA4
2023 Opportunities and Limitations of Hardware Timestamps in Concurrent Data Structures
abstract
Designing high-performance, highly-concurrent linearizable data structures is complex, especially when bulk operations (e.g., range queries) are included. Relying on a single source of synchronization, such as a logical global timestamp, unequivocally eases the design of the synchronization schemes. However, such a design creates a single point of contention, and thus carries performance downsides. As a result, designers often face the dilemma between a simple design and a performance bottleneck. Recently, modern commodity architectures have enabled low-level mechanisms that guarantee that the timestamp registers of all CPUs are synchronized, thus enabling the use of hardware timestamps in data structure designs. Although recent work already exploits this, this work aims at understanding the opportunities and limitations of using hardware timestamps in existing data structure designs. We address this challenge by applying hardware time-stamping to three recent state-of-the-art algorithms that use logical timestamps to support range queries in concurrent data structures. Our evaluation shows that the use of hardware timestamps does indeed improve performance compared to the original designs, achieving up to 5.5x improvement. More importantly, by removing the bottleneck of using global logical timestamps in these algorithms, we highlight the design choices that most significantly impact the use of hardware timestamps. Specifically, we show that the mechanism of labeling objects with timestamps plays an important role in maximizing the benefits of leveraging hardware timestamps.
Olivia Grimes, Jacob Nelson-Slivon, Roberto Palmieri
IPDPS4
2023 Distributed Multi-writer Multi-reader Atomic Register with Optimistically Fast Read and Write
abstract
A distributed multi-writer multi-reader (MWMR) atomic register is an important primitive that enables a wide range of distributed algorithms. Hence, improving its performance can have large-scale consequences. Since the seminal work of ABD emulation in the message-passing networks, many researchers study fast implementations of atomic registers under various conditions. "Fast'' means that a read or a write can be completed with 1 round-trip time (RTT), by contacting a simple majority. In this work, we explore an atomic register with optimal resilience and ''optimistically fast'' read and write operations. That is, both operations can be fast if there is no concurrent write.
Lewis Tseng, Neo Zhou, Cole Dumas, Tigran Bantikyan, Roberto Palmieri
SPAA5
2022 Bundling linked data structures for linearizable range queries
abstract
We present bundled references, a new building block to provide linearizable range query operations for highly concurrent lock-based linked data structures. Bundled references allow range queries to traverse a path through the data structure that is consistent with the target atomic snapshot. We demonstrate our technique with three data structures: a linked list, skip list, and a binary search tree. Our evaluation reveals that in mixed workloads, our design can improve upon the state-of-the-art techniques by 1.2x-1.8x for a skip list and 1.3x-3.7x for a binary search tree. We also integrate our bundled data structure into the DBx1000 in-memory database, yielding up to 40% gain over the same competitors.
Jacob Nelson-Slivon, Roberto Palmieri
PPoPP3
2022 Brief Announcement: Asymmetric Mutual Exclusion for RDMA
abstract
Coordinating concurrent access to a shared resource using mutual exclusion is a fundamental problem in computation. In this paper, we present a novel approach to mutual exclusion designed specifically for distributed systems leveraging a popular network communication technology, remote direct memory access (RDMA). Our approach enables local processes to avoid using RDMA operations entirely, limits the number of RDMA operations required by remote processes, and guarantees both starvation-freedom and fairness.
Jacob Nelson-Slivon, Lewis Tseng, Roberto Palmieri
DISC3
2022 Don't forget about synchronization! Guidelines for using locks on graphics processing units
abstract
Summary Heterogeneous devices are becoming necessary components of high performance computing infrastructures, and the graphics processing unit (GPU) plays an important role in this landscape. Given a problem, the established approach for exploiting the GPU is to design solutions that are parallel, without data dependencies. These solutions are then offloaded to the GPU's massively parallel capability. This design principle often leads to developing applications that cannot maximize GPU hardware utilization. The goal of this article is to challenge this common belief by empirically showing that allowing even simple forms of synchronization enables programmers to design solutions that admit conflicts and achieve better performance. Our experience shows that lock‐based solutions to the k‐means clustering problem, implemented using two well‐known locking strategies, outperform the well‐engineered and parallel KMCUDA on both synthetic and real datasets; with an average 8× faster runtimes across all locking algorithms on a synthetic dataset and 1.7× faster on a real world dataset across all locking algorithms (and max speedups of 71.3× and 2.75×, respectively). We validate these results using a more sophisticated clustering algorithm, namely fuzzy c‐means and summarize our findings by identifying three guidelines to help make concurrency effective when programming GPU applications.
Jacob Nelson-Slivon, dePaul Miller, Roberto Palmieri
Concurr. Comput. Pract. Exp.3
2021 FW-KV: improving read guarantees in PSI
abstract
We present FW-KV, a novel distributed transactional in-memory key-value store that guarantees the Parallel Snapshot Isolation (PSI) correctness level. FW-KV's primary goal is to allow its read-only transactions to access more up-to-date (fresher) versions of objects than Walter, the state-of-the-art implementation of PSI. FW-KV achieves that without assuming synchrony or a synchronized clock service. The improved level of freshness comes at no significant performance degradation, especially in low contention workloads, as assessed by our evaluation study including two standard OLTP benchmarks, YCSB and TPC-C. The performance gap between FW-KV and Walter is less than 5% in low contention scenarios, and less than 28% in high contention.
Masoomeh Javidi Kishi, Roberto Palmieri
Middleware2
2021 Bundled references: an abstraction for highly-concurrent linearizable range queries
abstract
Bundled references are a new building block to provide linearizable range query operations for highly concurrent linked data structures. They enable range queries to traverse a path through the data structure that is consistent with the target atomic snapshot. The path consists of the minimal amount of nodes that should be accessed to preserve linearizability.
Jacob Nelson-Slivon, Roberto Palmieri
PPoPP3
2021 Rabia: Simplifying State-Machine Replication Through Randomization
abstract
We introduce Rabia, a simple and high performance framework for implementing state-machine replication (SMR) within a datacenter. The main innovation of Rabia is in using randomization to simplify the design. Rabia provides the following two features: (i) It does not need any fail-over protocol and supports trivial auxiliary protocols like log compaction, snapshotting, and reconfiguration, components that are often considered the most challenging when developing SMR systems; and (ii) It provides high performance, up to 1.5x higher throughput than the closest competitor (i.e., EPaxos) in a favorable setup (same availability zone with three replicas) and is comparable with a larger number of replicas or when deployed in multiple availability zones.
Haochen Pan, Jesse Tuglu, Neo Zhou, Yicheng Shen, Xiong Zheng, Joseph Tassarotti, Lewis Tseng, Roberto Palmieri
SOSP9
2021 KVCG: a heterogeneous key-value store for skewed workloads
abstract
We present KVCG, a novel heterogeneous key-value store whose primary objective is to serve client requests targeting frequently accessed (hot) keys at sub-millisecond latency and requests targeting less frequently accessed (cold) keys with high throughput. To accomplish this goal, KVCG deploys an architecture where requests on hot keys are routed to a software cache operated by CPU threads, while the remainder are offloaded to a data repository optimized for execution on modern GPU devices. Cold/hot partitioning is done at runtime through a model trained with the incoming workload. Against a state-of-the-art competitor, we obtain up to 34x improvement in latency.
dePaul Miller, Jacob Nelson-Slivon, Roberto Palmieri
SYSTOR4
2021 Taming the Contention in Consensus-Based Distributed Systems
abstract
Contention plays a crucial role in the design of consensus protocols. State-of-the-art solutions optimize their performance for either very low or high contention situations. We proposeCaesar, a novel multi-leader Generalized Consensus protocol, most suitable for geographical replication, that is optimized for low-to-moderate contention. With an evaluation study, we show thatCaesaroutperforms other multi-leader (e.g., EPaxos) and single-leader (e.g., Multi-Paxos) competitors by up to 1.7x and 3.5x, respectively, in the presence of 30 percent conflicting requests, in a geo-replicated setting. Furthermore, we acknowledge that there is no one-size-fits- all consensus solution, especially for all levels of contentious workloads. Thus, we also proposeSpectrum, a consensus framework that is able to switch consensus protocols at runtime to enable a dynamic reaction to changes in the workload and deployment characteristics. We show empirically thatSpectrumcan guarantee high availability even during periods of transition between consensus protocols.
Balaji Arun, Sebastiano Peluso, Roberto Palmieri, Giuliano Losa, Binoy Ravindran
IEEE Trans. Dependable Secur. Comput.3
2020 On Reading Fresher Snapshots in Parallel Snapshot Isolation
abstract
In this paper we briefly present FPSI, a distributed transactional in-memory key-value store whose primary goal is to enable transactions to read more up-to-date (fresher) versions of shared objects than existing implementations of the well-known Parallel Snapshot Isolation (PSI) correctness level, in the absence of a synchronized clock service among nodes. FPSI builds upon Walter, an implementation of PSI well suited for social applications. The novel concurrency control at the core of FPSI allows its abort-free read-only transactions to access the latest version of objects upon their first contact to a node.
Masoomeh Javidi Kishi, Roberto Palmieri
ICDCS2
2020 On the Performance Impact of NUMA on One-sided RDMA Interactions
abstract
One of the consequences of ultra-fast networks like InfiniBand is that known implications of Non-uniform Memory Access (NUMA) locality now constitute a higher percentage of execution time for distributed systems employing Remote Direct Memory Access (RDMA). Our findings quantify the role NUMA plays in RDMA operation performance and uncovers unexpected behavior.
Jacob Nelson-Slivon, Roberto Palmieri
ICDCS2
2020 Performance Evaluation of the Impact of NUMA on One-sided RDMA Interactions
abstract
Remote direct memory access (RDMA) and non-uniform memory access (NUMA) are critical technologies of modern high-performance computing platforms. RDMA allows nodes to directly access memory on remote machines. Multiprocessor architectures implement NUMA to scale up memory access performance. When paired together, these technologies exhibit performance penalties under certain configurations. This paper is the first study to explore these configurations to provide quantitative findings on the impact of NUMA for RDMA-based systems. One of the consequences of ultra-fast networks is that known implications of NUMA locality now constitute a higher relative impact on the performance of RDMA-enabled distributed systems. Our study quantifies its role and uncovers unexpected behavior. In summary, poor NUMA locality of remotely accessible memory can lead to an automatic 20% performance degradation. Additionally, local workloads operating on remotely accessible memory can lead to 300% performance gap depending on memory locality. Surprisingly, configurations demonstrating this result contradict the presumed impact of NUMA locality. Our findings are validated using two generations of RDMA cards, a synthetic benchmark, and the popular application Memcached ported for RDMA.
Jacob Nelson-Slivon, Roberto Palmieri
SRDS2
2019 Understanding RDMA Behavior in NUMA Systems
abstract
Most high performance computing clusters are nowadays composed of large multicore machines that expose Non-Uniform Memory Access (NUMA), and they are interconnected using modern communication paradigms, such as Remote Direct Memory Access (RDMA). In this work we perform a study outlining the performance impact of these two technologies, NUMA and RDMA, when combined. Findings show that system's software architecture should be designed for NUMA and RDMA; otherwise major performance penalties occur.
Jacob Nelson-Slivon, Roberto Palmieri
CGO2
2019 SSS: Scalable Key-Value Store with External Consistent and Abort-free Read-only Transactions
abstract
We present SSS, a scalable transactional key-value store deploying a novel distributed concurrency control that provides external consistency for all transactions, never aborts read-only transactions due to concurrency, all without specialized hardware. SSS ensures the above properties without any centralized source of synchronization. SSS's concurrency control uses a combination of vector clocks and a new technique, called snapshot-queuing, to establish a single serialization order where transactions are guaranteed to read from the latest non-concurrent transaction externally visible to clients. We compare SSS against high performance key-value stores, Walter, ROCOCO, and a two-phase commit baseline. SSS outperforms 2PC-baseline by as much as 7x using 20 nodes; and ROCOCO by as much as 2.2x with long read-only transactions using 15 nodes.
Masoomeh Javidi Kishi, Sebastiano Peluso, Henry F. Korth, Roberto Palmieri
ICDCS4
2019 HaTS: Hardware-Assisted Transaction Scheduler
abstract
In this paper we present HaTS, a Hardware-assisted Transaction Scheduler. HaTS improves performance of concurrent applications by classifying the executions of their atomic blocks (or in-memory transactions) into scheduling queues, according to their so called conflict indicators. The goal is to group those transactions that are conflicting while letting non-conflicting transactions proceed in parallel. Two core innovations characterize HaTS. First, HaTS does not assume the availability of precise information associated with incoming transactions in order to proceed with the classification. It relaxes this assumption by exploiting the inherent conflict resolution provided by Hardware Transactional Memory (HTM). Second, HaTS dynamically adjusts the number of the scheduling queues in order to capture the actual application contention level. Performance results using the STAMP benchmark suite show up to 2x improvement over state-of-the-art HTM-based scheduling techniques.
Zhanhao Chen, Masoomeh Javidi Kishi, Jacob Nelson-Slivon, Roberto Palmieri
OPODIS5
2019 Processing transactions in a predefined order
abstract
In this paper we provide a high performance solution to the problem of committing transactions while enforcing a pre-defined order. We provide the design and implementation of three algorithms, which deploy a specialized cooperative transaction execution model. This model permits the propagation of written values along the chain of ordered transactions. We show that, even in the presence of data conflicts, the proposed algorithms outperform single threaded execution, and other baseline and specialized state-of-the-art competitors (e.g., STMLite). The maximum speedup achieved in micro benchmarks, STAMP, PARSEC and SPEC200 applications is in the range of 4.3x -- 16.5x.
Mohamed M. Saad, Masoomeh Javidi Kishi, Shihao Jing, Sandeep Hans, Roberto Palmieri
PPoPP5
2019 Brief Announcement: On the Correctness of Transaction Processing with External Dependency
Masoomeh Javidi Kishi, Roberto Palmieri
DISC3
2019 Lerna: Parallelizing Dependent Loops Using Speculation
abstract
We present Lerna, an end-to-end tool that automatically and transparently detects and extracts parallelism from data-dependent sequential loops. Lerna uses speculation combined with a set of techniques including code profiling, dependency analysis, instrumentation, and adaptive execution. Speculation is needed to avoid conservative actions and detect actual conflicts. Lerna targets applications that are hard-to-parallelize due to data dependency. Our experimental study involves the parallelization of 13 applications with data dependencies. Results on a 24-core machine show an average of 2.7× speedup for micro-benchmarks and 2.5× for the macro-benchmarks.
Mohamed M. Saad, Roberto Palmieri, Binoy Ravindran
ACM Trans. Storage2
2018 Nemo: NUMA-aware Concurrency Control for Scalable Transactional Memory
abstract
In this paper we present Nemo, a NUMA-aware Transactional Memory (TM) design and implementation optimized for promoting scalability in applications running on top of NUMA architectures. Nemo deploys a hybrid design where conflicting threads alternate the usage of single timestamps and vector clocks to identify inconsistent executions depending upon the source of conflict. We assessed the performance of Nemo by using both synthetic and well-known OLTP transactional workloads. Our approach offers improvements over the six state-of-the-art competitors we implemented.
Mohamed Mohamedin, Sebastiano Peluso, Masoomeh Javidi Kishi, Roberto Palmieri
ICPP5
2018 Lerna: Parallelizing Dependent Loops Using Speculation
abstract
We present Lerna, an end-to-end tool that automatically and transparently detects and extracts parallelism from data dependent sequential loops using speculation combined with a set of techniques including code profiling, dependency analysis, instrumentation, and adaptive execution. Speculation is needed to avoid conservative actions and detect actual conflicts. Lerna targets applications that are hard-to-parallelize due to data dependency. Our experimental study involves the parallelization of 13 applications with data dependencies. Results on a 24-core machine show an average of 2.7x speedup for micro-benchmarks and 2.5x for the macro-benchmarks.
Mohamed M. Saad, Roberto Palmieri, Binoy Ravindran
SYSTOR2
2018 NUMASK: High Performance Scalable Skip List for NUMA
abstract
This paper presents NUMASK, a skip list data structure specifically designed to exploit the characteristics of Non-Uniform Memory Access (NUMA) architectures to improve performance. NUMASK deploys an architecture around a concurrent skip list so that all metadata accesses (e.g., traversals of the skip list index levels) read and write memory blocks allocated in the NUMA zone where the thread is executing. To the best of our knowledge, NUMASK is the first NUMA-aware skip list design that goes beyond merely limiting the performance penalties introduced by NUMA, and leverages the NUMA architecture to outperform state-of-the-art concurrent high-performance implementations. We tested NUMASK on a four-socket server. Its performance scales for both read-intensive and write-intensive workloads (tested up to 160 threads). In write-intensive workload, NUMASK shows speedups over competitors in the range of 2x to 16x.
Henry Daly, Michael F. Spear, Roberto Palmieri
DISC4
2017 Speeding up Consensus by Chasing Fast Decisions
abstract
This paper proposes CAESAR, a novel multi-leader Generalized Consensus protocol for geographically replicated sites. The main goal of CAESAR is to overcome one of the major limitations of existing approaches, which is the significant performance degradation when application workload produces conflicting requests. CAESAR does that by changing the way a fast decision is taken: its ordering protocol does not reject a fast decision for a client request if a quorum of nodes reply with different dependency sets for that request. The effectiveness of CAESAR is demonstrated through an evaluation study performed on Amazon's EC2 infrastructure using 5 geo-replicated sites. CAESAR outperforms other multi-leader (e.g., EPaxos) competitors by as much as 1.7x in the presence of 30% conflicting requests, and single-leader (e.g., Multi-Paxos) by up to 3.5x.
Balaji Arun, Sebastiano Peluso, Roberto Palmieri, Giuliano Losa, Binoy Ravindran
DSN3
2017 Shield: A middleware to tolerate CPU transient faults in multicore architectures
abstract
Multicore architectures are increasingly becoming prone to transient faults. In this paper we present Shield, a middleware to provide transactional applications with resiliency to those faults that can happen anytime during the execution of a processor but do not cause any hardware interruption. Shield is inspired by the state machine replication approach, where computational resources are partitioned, the shared state is fully replicated, and requests are executed by all partitions in the same order. Our results using the Tilera reveal limited overhead with respect to the non-fault-tolerant approaches on most benchmarks, and an average performance gain of 1.54× over traditional byzantine fault tolerance protocols.
Mohamed Mohamedin, Masoomeh Javidi Kishi, Roberto Palmieri
NCA3
2017 HiperTM: High performance, fault-tolerant transactional memory
Sachin Hirve, Roberto Palmieri, Binoy Ravindran
Theor. Comput. Sci.2
2017 Optimistic Transactional Boosting
abstract
The last two decades witnessed the success of many efficient designs of concurrent data structures. A large set of them has a common base principle: each operation is split into a read-only traversal phase, which scans the data structure without locking or monitoring, and a read-write commit phase, which atomically validates the output of the traversal phase and applies the needed modifications to the data structure. In this paper we introduce Optimistic Transactional Boosting (OTB), an optimistic methodology for extending those designs in order to support the composition of multiple operations into one atomic execution by building a single traversal phase and a single commitphase for the whole atomic execution. As a result, OTB-based data structures are optimisticand composable. The former because they defer any locking and/or monitoring to the commit phase of the entire atomic execution; the latter because they allow the execution of multiple operations atomically. Additionally, in this paper we provide a theoretical model for analyzing OTB-based data structures and proving their correctness. In particular, we extended a recent approach that models concurrent data structures by including the two notions of optimism and composition of operations.
Roberto Palmieri, Sebastiano Peluso, Binoy Ravindran
IEEE Trans. Parallel Distributed Syst.2
2017 Managing Resource Limitation of Best-Effort HTM
abstract
The first release of hardware transactional memory (HTM) as commodity processor posed the question of how to efficiently handle its best-effort nature. In this paper we present Part-HTM, a hybrid transactional memory protocol that solves the problem of transactions aborted due to the resource limitations (space/time) of current best-effort HTM. The basic idea of Part-HTM is to partition those transactions into multiple sub-transactions, which can likely be committed in hardware. Due to the eager nature of HTM, we designed a low-overhead software framework to preserve transaction's correctness (with and without opacity) and isolation. Part-HTM is effective: our evaluation study confirms that its performance is the best in all tested cases, except for those where HTM cannot be outperformed. However, in such a workload, Part-HTM still performs better than all other software and hybrid competitors.
Mohamed Mohamedin, Roberto Palmieri, Binoy Ravindran
IEEE Trans. Parallel Distributed Syst.2
2016 Making Fast Consensus Generally Faster
abstract
New multi-leader consensus protocols leverage the Generalized Consensus specification to enable low latency, even load balancing, and high parallelism. However, these protocols introduce inherent costs with significant performance impact: they need quorums bigger than the minimum required to solve consensus and need to track dependency relations among proposals. In this paper we present M2PAXOS, an implementation of Generalized Consensus that provides fast decisions (i.e., delivery of a command in two communication delays) by leveraging quorums composed of a majority of nodes and by exploiting workload locality. M2PAXOS does not establish command dependencies based on conflicts, instead mapping nodes to accessed objects and enforcing that commands accessing the same objects be ordered by the same node. Our experimental evaluation confirms the effectiveness of M2PAXOS, gaining up to 7X over state-of-the-art Consensus and Generalized Consensus algorithms under partitioned data accesses and up to 5.5× using the TPC-C workload.
Sebastiano Peluso, Alexandru Turcu, Roberto Palmieri, Giuliano Losa, Binoy Ravindran
DSN3
2016 On designing NUMA-aware concurrency control for scalable transactional memory
abstract
NUMA architectures posed the challenge of rethinking parallel applications due to the non-homogeneity introduced by their design, and their real benefits are limited to the characteristics of the particular workload. We name as partitionable transactional workloads such workloads that may be able to exploit the distributed nature of NUMA, such as transactional workloads where data and accesses can be easily partitioned among the so called NUMA zones. However, in case those workloads require the synchronization on shared data, we have to face the issue of exploiting the NUMA architecture also in the concurrency control for their transactions. Therefore in this paper we present a NUMA-aware concurrency control for transactional memory that we designed for promoting scalability in scenarios where both the transactional workload is prone to scale, and the characteristics of the underlying memory model are inherently non-uniform, such as NUMA architectures.
Mohamed Mohamedin, Roberto Palmieri, Sebastiano Peluso, Binoy Ravindran
PPoPP2
2016 On ordering transaction commit
abstract
In this poster paper, we briefly introduce an effective solution to address the problem of committing transactions enforcing a predefined order. To do that, we overview the design of two algorithms that deploy a cooperative transaction execution that circumvents the transaction isolation constraint in favor of propagating written values among conflicting transactions. A preliminary implementation shows that even in the presence of data conflicts, the proposed algorithms outperform other competitors, significantly.
Mohamed M. Saad, Roberto Palmieri, Binoy Ravindran
PPoPP2
2016 Extending TM Primitives using Low Level Semantics
abstract
Transactional Memory (TM) has recently emerged as an optimistic concurrency control technique that isolates concurrent executions at the level of memory reads and writes, therefore providing an easy programming interface. However, such transparency could be overly conservative from an application-level perspective. In this work, we propose an extension to the classical TM primitives (read and write) to capture program code semantics (e.g., conditional expressions) while maintaining the same level of programming abstraction. We deployed this extension on two state-of-the-art STM algorithms and integrated it into the GCC compiler and the RSTM software framework. Results showed speedups of up to 4x (average 1.6x) on different applications including micro benchmarks and STAMP.
Mohamed M. Saad, Roberto Palmieri, Binoy Ravindran
SPAA2
2016 Exploiting Parallelism of Distributed Nested Transactions
abstract
We present SPCN, a framework that further extends the benefits of having distributed partially rollbackable (closed-nested) transactions by exploiting their parallel activation. SPCN provides support for executing each closed-nested transaction in parallel with others belonging to the same parent transaction. Their commit sequence is equivalent to the serial commit execution, but parallelism is leveraged to improve performance by reducing the amount of serial network communication. As we show in our evaluation study using 20 nodes on Amazon EC2 and three well-known benchmarks, SPCN provides performance improvement over the original closed nesting, gaining more than 2× in throughput.
Duane Niles, Roberto Palmieri, Binoy Ravindran
SYSTOR2
2016 Opacity vs TMS2: Expectations and Reality
Sandeep Hans, Roberto Palmieri, Sebastiano Peluso, Binoy Ravindran
DISC3
2016 Remote Transaction Commit: Centralizing Software Transactional Memory Commits
abstract
Software Transactional Memory (STM) has recently emerged as a promising synchronization abstraction for multicore architectures. State-of-the-art STM algorithms, however, suffer from performance challenges due to contention and spinning on locks during the transaction commit phase. In this paper, we introduce Remote Transaction Commit (or RTC), a mechanism for executing commit phases of STM transactions. RTC dedicates server cores to execute transactional commit phases on behalf of application threads. This approach has two major benefits. First, it decreases the overheads of spinning on locks during commit, such as the number of cache misses, blocking of lock holders, and CAS operations. Second, it enables exploiting the benefits of coarse-grained locking algorithms (simple and fast lock acquisition, reduced false conflicts) and bloom filter-based algorithms (concurrent execution of independent transactions). Our experimental study on a 64-core machine with four sockets shows that RTC solves the problem of performance degradation due to spin locking on both micro-benchmarks (red-black trees), and macro-benchmarks (STAMP), especially when the commit phase is relatively long and when thread contention increases.
Roberto Palmieri, Binoy Ravindran
IEEE Trans. Computers2
2016 On Open Nesting in Distributed Transactional Memory
abstract
Distributed Transactional Memory (DTM) is a recent but promising model for programming distributed systems. It aims to present programmers with a simple to use distributed concurrency control abstraction (transactions), while maintaining performance and scalability similar to distributed fine-grained locks. Any complications usually associated with such locks (e.g., distributed deadlocks) are avoided. In this article, we analyze the use of open nesting in the DTM setting. We extend two DTM algorithms, Transactional Forwarding Algorithm (TFA) and SCORe with support for open nested transactions and we implement them into two frameworks for running distributed transactions, such as Hyflow and Infinispan. We discuss the mechanisms and performance implications of such nesting, and identify the cases where using open nesting is warranted and the relevant parameters for such a decision. To the best of our knowledge, our work also contributes the first ever implementations of DTM systems with support for open-nested transactions.
Alexandru Turcu, Roberto Palmieri, Binoy Ravindran
IEEE Trans. Computers2
2016 Automated Data Partitioning for Highly Scalable and Strongly Consistent Transactions
abstract
Modern transactional processing systems need to be fast and scalable, but this means many such systems settled for weak consistency models. It is however possible to achieve all of strong consistency, high scalability and high performance, by using fine-grained partitions and light-weight concurrency control that avoids superfluous synchronization and other overheads such as lock management. Independent transactions are one such mechanism, that rely on good partitions and appropriately defined transactions. On the downside, it is not usually straightforward to determine optimal partitioning schemes, especially when dealing with non-trivial amounts of data. Our work attempts to solve this problem by automating the partitioning process, choosing the correct transactional primitive, and routing transactions appropriately.
Alexandru Turcu, Roberto Palmieri, Binoy Ravindran, Sachin Hirve
IEEE Trans. Parallel Distributed Syst.2
2015 On Preserving Data Integrity of Transactional Applications on Multicore Architectures
abstract
Multicore architectures are increasingly becoming prone to transient faults. In this paper we briefly present Shield, a middleware to provide transactional applications with resiliency to those faults that can happen anytime during the execution of a processor but do not cause any hardware interruption. Shield is inspired by the state machine replication approach, where computational resources are partitioned, the shared state is fully replicated, and requests are executed by all partitions in the same order. Shield embeds a set of algorithmic and system innovations to limit the overhead with respect to non-fault-tolerant solutions. They include a fast total order layer that lets application threads and computational nodes co-operate in order to fast deliver.
Mohamed Mohamedin, Roberto Palmieri, Binoy Ravindran
ICDCS2
2015 On Exploiting Locality for Generalized Consensus
abstract
Single leader-based Consensus protocols are known to stop scaling once the leader reaches its saturation point. On the other hand, establishing Consensus of commands by taking into account only their dependencies (as specified by Generalized Consensus) is appealing because of the potentially higher parallelism and lower latency. However, current solutions have well-known pitfalls due to the higher quorum size, which is required to exploit low-latency fast decisions, and the need for tracking dependency relations. In this paper we briefly introduce M2PAXOS, a new implementation of Generalized Consensus that provides a fast decision of commands by leveraging a classic quorum size, which matches just the majority of nodes deployed. M2PAXOS does not establish command dependencies based on conflicts, rather it associates accessed objects with nodes, so that the delivery decision of commands operating on the same objects is made by a common node. The evaluation study of M2PAXOS confirms its effectiveness by showing an improvement up to 7× over state-of-the-art (Generalized) Consensus protocols.
Sebastiano Peluso, Alexandru Turcu, Roberto Palmieri, Binoy Ravindran
ICDCS3
2015 An Automated Framework for Decomposing Memory Transactions to Exploit Partial Rollback
abstract
In this paper, we present a framework that automatically decomposes programmer-written flat transactions into closed-nested transactions. The framework relies on two key mechanisms for the decomposition. The first is a static tool that analyzes application source code and produces a compact representation of transactions' business logic. The second is a run-time monitor that captures the actual contention level of shared objects and, relying on the outcome of the static tool, triggers the optimal closed-nested configuration for the workload at hand. We implemented this framework atop QR-CN, an open source fault-tolerant DTM written in Java. Our experimental studies conducted using the TPC-C, Vacation and Bank benchmarks reveal that the framework yields better performance than flat nesting and manual closed nesting, especially when the workload changes.
Aditya Dhoke, Roberto Palmieri, Binoy Ravindran
IPDPS2
2015 Disjoint-Access Parallelism: Impossibility, Possibility, and Cost of Transactional Memory Implementations
abstract
Disjoint-Access Parallelism (DAP) is considered one of the most desirable properties to maximize the scalability of Transactional Memory (TM). This paper investigates the possibility and inherent cost of implementing a DAP TM that ensures two properties that are regarded as important to maximize efficiency in read-dominated workloads, namely having invisible and wait-free read-only transactions. We first prove that relaxing Real-Time Order (RTO) is necessary to implement such a TM. This result motivates us to introduce Witnessable Real-Time Order (WRTO), a weaker variant of RTO that demands enforcing RTO only between directly conflicting transactions. Then we show that adopting WRTO makes it possible to design a strictly DAP TM with invisible and wait-free read-only transactions, while preserving strong progressiveness for write transactions and an isolation level known in literature as Extended Update Serializability. Finally, we shed light on the inherent inefficiency of DAP TM implementations that have invisible and wait-free read-only transactions, by establishing lower bounds on the time and space complexity of such TMs.
Sebastiano Peluso, Roberto Palmieri, Paolo Romano 0002, Binoy Ravindran, Francesco Quaglia
PODC2
2015 Brief Announcement: Managing Resource Limitation of Best-Effort HTM
abstract
The first release of hardware transactional memory (HTM) as commodity processor posed the question of how to efficiently handle its best-effort nature. In this paper we present Part-HTM, the first hybrid transactional memory protocol that solves the problem of transactions aborted due to the resource limitations (space/time) of current best-effort HTM. The basic idea of Part-HTM is to partition those transactions into multiple sub-transactions, which can likely be committed in hardware. Due to the eager nature of HTM, we designed a low-overhead software framework to preserve transaction's correctness (with and without opacity).
Mohamed Mohamedin, Roberto Palmieri, Binoy Ravindran
SPAA2
2015 Brief Announcement: On Scheduling Best-Effort HTM Transactions
abstract
This paper shows the issues to face while designing contention management policies that involve best-effort hardware transactions. Also, in this paper we present Octonauts, a solution for scheduling HTM transactions without relying on on-the-fly information. Octonauts learns the objects accessed by a hardware transaction while running and it uses them in case of conflict. It also proposes an innovative scheme for optimizing the communication between transactions running in hardware and software.
Mohamed Mohamedin, Roberto Palmieri, Binoy Ravindran
SPAA2
2015 Transactional Interference-Less Balanced Tree
Roberto Palmieri, Binoy Ravindran
DISC2
2014 Remote Invalidation: Optimizing the Critical Path of Memory Transactions
abstract
Software Transactional Memory (STM) systems are increasingly emerging as a promising alternative to traditional locking algorithms for implementing generic concurrent applications. To achieve generality, STM systems incur overheads to the normal sequential execution path, including those due to spin locking, validation (or invalidation), and commit/abort routines. We propose a new STM algorithm called Remote Invalidation (or RInval) that reduces these overheads and improves STM performance. RInval's main idea is to execute commit and invalidation routines on remote server threads that run on dedicated cores, and use cache-aligned communication between application's transactional threads and the server routines. By remote execution of commit and invalidation routines and cache-aligned communication, RInval reduces the overhead of spin locking and cache misses on shared locks. By running commit and invalidation on separate cores, they become independent of each other, increasing commit concurrency. We implemented RInval in the Rochester STM framework. Our experimental studies on micro-benchmarks and the STAMP benchmark reveal that RInval outperforms InvalSTM, the corresponding non-remote invalidation algorithm, by as much as an order of magnitude. Additionally, RInval obtains competitive performance to validation-based STM algorithms such as NOrec, yielding up to 2x performance improvement.
Roberto Palmieri, Binoy Ravindran
IPDPS2
2014 Archie: a speculative replicated transactional system
abstract
We present Archie, a high performance fault-tolerant transactional system. Archie complies with the State Machine Approach, where the transactional state is fully replicated and total ordered transactions are executed on the replicas. Archie avoids the serial execution after transactions get ordered, which is the typical bottleneck of those protocols, by anticipating the work and using speculation to process transactions in parallel, enforcing a predefined order. The key feature of Archie is to avoid any non-trivial operation to perform post total order's notification, in case the sequencer node remains stable (only a single timestamp increment is needed for committing a transaction). This approach significantly shortens the transaction's critical path. The contention of speculative execution is always kept limited by activating a fixed number of transactions at a time. A comprehensive evaluation, using three competitors and three well known benchmarks, shows that Archie outperforms competitors in all medium/high contention scenarios.
Sachin Hirve, Roberto Palmieri, Binoy Ravindran
Middleware2
2014 On Making Transactional Applications Resilient to Data Corruption Faults
abstract
Multicore architectures are becoming increasingly prone to transient faults and data corruption. Relying on a multicore architecture is the common solution for increasing performance and scalability of core applications including transactional applications. In this paper we present SoftX, a low-invasive protocol for supporting execution of transactional applications relying on speculative processing and dedicated committer threads. Upon starting a transaction, SoftX forks a number of threads running the same transaction independently. The commit phase is handled by dedicated threads for optimizing synchronization's overhead. We conduct an evaluation study showing the performance obtained with the implementation of SoftX on a 48 cores AMD machine, running List, Bank and TPC-C benchmarks. Results reveal better performance than classical replication-based fault-tolerant systems and limited overhead with respect to non fault-tolerant protocols. We ported SoftX to a message-passing architecture, Tilera TILE-Gx. Hardware message-passing is an important emerging trend in multicore architectures. Our experiments on Tilera show that SoftX is still more efficient than replication.
Mohamed Mohamedin, Roberto Palmieri, Binoy Ravindran
NCA2
2014 On Developing Optimistic Transactional Lazy Set
Roberto Palmieri, Binoy Ravindran
OPODIS2
2014 Be General and Don't Give Up Consistency in Geo-Replicated Transactional Systems
Alexandru Turcu, Sebastiano Peluso, Roberto Palmieri, Binoy Ravindran
OPODIS3
2014 Optimistic transactional boosting
abstract
Herlihy and Koskinen's transactional boosting methodology addressed the challenge of converting concurrent data structures into transactional ones. We present an optimistic methodology for boosting concurrent collections. Optimistic boosting allows greater data structure-specific optimizations, easier integration with STM frameworks, and lower restrictions on the boosted operations than the original boosting methodology.
Roberto Palmieri, Binoy Ravindran
PPoPP2
2014 Distributed Transactional Contention Management as the Traveling Salesman Problem
Bo Zhang 0016, Binoy Ravindran, Roberto Palmieri
SIROCCO3
2014 Automated Data Partitioning for Highly Scalable and Strongly Consistent Transactions
abstract
Modern transactional processing systems need to be fast and scalable, but this means many such systems settled for weak consistency models. It is however possible to achieve all of strong consistency, high scalability and high performance, by using fine-grained partitions and light-weight concurrency control that avoids superfluous synchronization and other overheads such as lock management. Independent transactions are one such mechanism, that rely on good partitions and appropriately defined transactions. On the downside, it is not usually straightforward to determine optimal partitioning schemes, especially when dealing with non-trivial amounts of data. Our work attempts to solve this problem by automating the partitioning process, choosing the correct transactional primitive, and routing transactions appropriately.
Alexandru Turcu, Roberto Palmieri, Binoy Ravindran
SYSTOR2
2014 Breaching the Wall of Impossibility Results on Disjoint-Access Parallel TM
Sebastiano Peluso, Roberto Palmieri, Paolo Romano 0002, Binoy Ravindran, Francesco Quaglia
DISC2
2014 On speculative replication of transactional systems
Paolo Romano 0002, Roberto Palmieri, Francesco Quaglia, Nuno Carvalho, Luís E. T. Rodrigues
J. Comput. Syst. Sci.2
2013 On transactional memory concurrency control in distributed real-time programs
abstract
We consider distributed transactional memory (DTM) for concurrency control in distributed real-time programs, and present an algorithm called RT-TFA. RT-TFA transparently handles object relocation and versioning using an asynchronous clock-based validation technique, and resolves transactional contention using task time constraints. We implement the RT-TFA on top of JChronOS, a layer extending the scheduling capabilities of ChronOS for Java programs. We conduct an extensive evaluation study comparing RT-TFA with well known competitors for real-time distributed applications. Our results reveal that RT-TFA outperforms competitors in mostly scenarios up to 43% with added advantage of better programmability and composability.
Sachin Hirve, Aaron Lindsay, Binoy Ravindran, Roberto Palmieri
CLUSTER4
2013 Scheduling Open-Nested Transactions in Distributed Transactional Memory
Junwhan Kim, Roberto Palmieri, Binoy Ravindran
COORDINATION2
2013 ByteSTM: Virtual Machine-Level Java Software Transactional Memory
Mohamed Mohamedin, Binoy Ravindran, Roberto Palmieri
COORDINATION3
2013 Enhancing Concurrency in Distributed Transactional Memory through Commutativity
Junwhan Kim, Roberto Palmieri, Binoy Ravindran
Euro-Par2
2013 HyflowCPP: A Distributed Transactional Memory Framework for C++
abstract
We present the first ever distributed transactional memory (DTM) framework for distributed concurrency control in C++, called HyflowCPP. HyflowCPP provides distributed atomic sections, and plug gable support for policies for concurrency control, directory lookup, contention management, and networking. While there exists other DTM frameworks, they mostly target VM-based languages (e.g., Java, Scala). Additionally, HyflowCPP provides uniquely distinguishing TM features including strong atomicity, closed and open nesting, and check pointing. Our experimental studies revealed that HyflowCPP achieves up to 6x performance improvement over state-of-the-art DTM frameworks.
Sudhanshu Mishra, Alexandru Turcu, Roberto Palmieri, Binoy Ravindran
NCA3
2013 On the Viability of Speculative Transactional Replication in Database Systems: A Case Study with PostgreSQL
abstract
We investigate the feasibility of systematic speculative processing in the context of Optimistic Atomic Broadcast (OAB) based replication of database systems. Specifically, we present the design and prototypal implementation of a fully speculative version of the Postgre SQL open source relational database, together with experimental results showing performance advantages over non-speculative replication.
Sebastiano Peluso, Roberto Palmieri, Francesco Quaglia, Binoy Ravindran
NCA2
2012 ASAP: An Aggressive SpeculAtive Protocol for Actively Replicated Transactional Systems
abstract
Recent advances in the field of replicated, fault tolerant transactional systems make systematic use of Optimistic Atomic Broadcast (OAB) group communication primitives in order to coordinate the replicas. According to this scheme, the replicas gain information on the existence of transactional requests before a final and global agreement is reached on the transaction serialization order. Hence, speculative processing schemes can be exploited in order to maximize the overlap between local computation and distributed coordination activities. In this article we present ASAP, an innovative Aggressive SpeculAtive Protocol, which exhibits the following two peculiarities: (A) it allows speculating along different transaction serialization orders, thus increasing the likelihood of successful overlap between local processing and coordination in case of mismatches between the optimistic and the final delivery sequence of incoming requests, (B) it speculates along chains of conflicting transactions, tracking data dependencies among transactions via an innovative concurrency control mechanism, which allows determining in a timely fashion the alternative serialization orders to be speculatively explored. Via a simulation study in the context of Software Transactional Memory systems we show ASAP can achieve robust performance independently of the likelihood of reorder between optimistic and final deliveries, providing remarkable performance improvements (enhancing the maximum sustainable throughput up to a 2x factor) with respect to state of the art speculative replication protocols.
Roberto Palmieri, Francesco Quaglia, Paolo Romano 0002
NCA1
2012 On the analytical modeling of concurrency control algorithms for Software Transactional Memories: The case of Commit-Time-Locking
Pierangelo di Sanzo, Bruno Ciciani, Roberto Palmieri, Francesco Quaglia, Paolo Romano 0002
Perform. Evaluation3
2011 OSARE: Opportunistic Speculation in Actively REplicated Transactional Systems
abstract
In this work we present OSARE, an active replication protocol for transactional systems that combines the usage of Optimistic Atomic Broadcast with a speculative concurrency control mechanism in order to overlap transaction processing and replica synchronization. OSARE biases the speculative serialization of transactions towards an order aligned with the optimistic message delivery order. However, due to the lock-free nature of its concurrency control algorithm, at high concurrency levels, namely when the probability of mismatches between optimistic and final deliveries is higher, OSARE explores additional alternative transaction serialization orders in a lightweight and opportunistic fashion. A simulation study we carried out in the context of Software Transactional Memory systems shows that OSARE achieves robust performance also in scenarios characterized by non-minimal likelihood of reorder between optimistic and final deliveries, providing remarkable speed-up with respect to state of the art speculative replication protocols.
Roberto Palmieri, Francesco Quaglia, Paolo Romano 0002
SRDS1
2010 An Optimal Speculative Transactional Replication Protocol
abstract
In this paper we investigate the problem of speculative processing in a replicated transactional system layered on top of an optimistic atomic broadcast service. We consider a realistic model in which transactions' read/write sets are not known a-priori, and transactions' data access patterns may vary depending on the observed snapshot. We formalize a set of correctness and optimality properties aimed at ensuring that transactions are not activated on inconsistent snapshots, as well as the minimality and completeness of the set of explored serialization orders. Finally, an optimal speculative transaction replication protocol is presented.
Paolo Romano 0002, Roberto Palmieri, Francesco Quaglia, Nuno Carvalho, Luís E. T. Rodrigues
ISPA2
2010 AGGRO: Boosting STM Replication via Aggressively Optimistic Transaction Processing
abstract
Software Transactional Memories (STMs) are emerging as a potentially disruptive programming model. In this paper we are address the issue of how to enhance dependability of STM systems via replication. In particular we present AGGRO, an innovative Optimistic Atomic Broadcast-based (OAB) active replication protocol that aims at maximizing the overlap between communication and processing through a novel AGGRessively Optimistic concurrency control scheme. The key idea underlying AGGRO is to propagate dependencies across uncommitted transactions in a controlled manner, namely according to a serialization order compliant with the optimistic message delivery order provided by the OAB service. Another relevant distinguishing feature of AGGRO is of not requiring a-priori knowledge about read/write sets of transactions, but rather to detect and handle conflicts dynamically, i.e. as soon (and only if) they materialize. Based on a detailed simulation study we show the striking performance gains achievable by AGGRO (up to 6x increase of the maximum sustainable throughput, and 75% response time reduction) compared to literature approaches for active replication of transactional systems.
Roberto Palmieri, Francesco Quaglia, Paolo Romano 0002
NCA1
2010 Brief announcement: on speculative replication of transactional systems
abstract
We define the problem of speculative processing in a replicated transactional system layered on top of an optimistic atomic broadcast service. A realistic model is considered in which transactions' read and write sets are not a priori known and transactions' data access patterns may vary depending on the observed snapshot. We formalize a set of correctness and optimality properties ensuring the minimality and completeness of the set of explored serialization orders within the replicated transactional system.
Paolo Romano 0002, Roberto Palmieri, Francesco Quaglia, Nuno Carvalho, Luís E. T. Rodrigues
SPAA2