This paper presents a unique approach to enable real-time lifespan prediction of semiconductor power modules using a Hardware-in-the-Loop (HIL) system. By integrating the module's overall loss characteristics—specifically switching and conduction losses—with a thermoelectric model of the thermal management system, this research demonstrates that the model can dynamically estimates the junction temperature profile of the semiconductor devices in response to a changing torque demand profile for the motor drive system. This capability enables continuous monitoring of the module's operational time and cumulative stress induced on the devices to compute accumulated remaining lifetime or time-to-failure (TTF). This study provides an architectural framework for the HIL system with high-fidelity component models of multiple physical domains, allowing simulation of dynamic behaviors of a closely-coupled motor drive system. The advanced real-time computation and measurement functionalities of the HIL system allow for both dynamic lifetime calculations based on simulated data and aggregate lifetime predictions utilizing historical data. Moreover, this paper details an algorithm that not only computes cumulative damage but also synthesizes these data into a comprehensive aggregated lifetime metric. This methodology can enhance the maintenance scheduling strategies and operational reliability of semiconductor devices in critical applications, ultimately extending their service life while optimizing performance.

This work-in-progress Innovative Practice paper discusses a formalized classroom experience that introduces undergraduate engineering students to restricted research opportunities and careers, consistent with the charter of the Virginia Tech Hume Center. Specifically, this paper highlights the creation and results from two initial offerings of a sophomore-level multidisciplinary engineering course that explores unique national security engineering topics, ranging from technical deep dives that stress unique engineering design requirements, tear downs of real platforms, design methodologies relevant to the Department of Defense (DoD) and Intelligence Community (IC), traditional focuses on research methods, and an overview of the U.S. security clearance process. Further, students are prepared to engage in restricted research opportunities on campus, either as part of an individual faculty member's research or as part of the Hume Center's adaptation of the Vertically Integrated Projects (VIP) experiential learning program. Early post-course survey results confirm that the class encourages students towards future career opportunities in national defense.

Once shared, our personal information on the Internet is no longer private. We routinely receive emails from companies that we have not had any known interaction with, and are receiving an increasingly large volume of spam phone calls. In this paper, we describe interim results from an experiment designed to quantify who is using and distributing our personally identifying information (PII). To do this, we set up 300 fake identities, each with an email address and around half with a live phone number, and performed one-time online interactions with 188 distinct companies. Over a 9-month span, we received around 20,000 artifacts and found that reputable companies, surprisingly, do not sell our information in ways that we could detect, that there was no observation of undue foreign interest during the election, and that the classic “extended vehicle warranty” scam is still in active use today.

Online interactions typically require a user to input personally identifiable information (PII) such as their name, email, and demographic characteristics. The service provider may then use that PII to send correspondence to the user’s email address or phone number, either through themselves or a third party. This study aims to create a tentative framework for measuring political bias within PII-harnessing communications. Three distinct spheres of analysis (time, corporate political values, and foreign senders) are utilized to develop this system of measurement. Although the results of a small-scale test of our method were inconclusive, our process for quantitatively measuring political bias nonetheless serves as a proof of concept that can be applied to future research.

Recent work has quantified the degradations that occur in convolutional neural nets (CNN) deployed in harsh environments like space-based image or radio frequency (RF) processing applications. Such degradations yield a robust correlation and causality between single-event upset (SEU) induced errors in memory weights of on-orbit CNN implementations. However, minimal considerations have been given to how the resilience of CNNs can be improved algorithmically as opposed to via enhanced hardware. This paper focuses on RF-processing CNNs and performs an in-depth analysis of applying software-based error detection and correction mechanisms, which may subsequently be combined with protections of radiation-hardened processor platforms. These techniques are more accessible for low cost smallsat platforms than ruggedized hardware. Additionally, methods for minimizing the memory and computational complexity of the resulting resilience techniques are identified. Combined with periodic scrubbing, the resulting techniques are shown to improve expected lifetimes of CNN-based RF-processing algorithms by several orders of magnitude.

Integration of industrial Internet of Things (IIoT) into critical infrastructures (CIs) is aiming to improve efficiency in many crucial areas. The positive benefits of IIoT are increasing the demand for devices, but without proper security design foundations, CIs may be open to many different attack vectors. This lack of IIoT device security standards is a major concern. Due to the nature of these infrastructures and impact of compromises, CI device security is an utmost concern and must be focused on during all phases of development and manufacturing as opposed to the addition of security after functional design as seen with many current Internet of Things (IoT) devices. Many of these sensors and devices have limited resources, such as low power consumption, reduced memory storage, and reduced fixed-point processing capabilities. Traditional security protocols and solutions are often not practical on these restrained devices, and there are no current standards for characterizing device security. This paper presents a candidate security level-based architecture for low power IoT-CI devices implementing modular, low power, security primitives that are shown through simulation models and embedded software implementation to create a robustly layered defense-in-depth IoT architecture. This candidate architecture will help provide a foundation for future CI-IoT device security standardization.

Trust is a prominent concern with the continued expansion of the Internet of Things (IoT). As new devices enter the market, device security must be a design pillar. In order to trust these devices, they must be identifiable and authenticated before they begin transmitting possible sensitive information, and given the vast number of IoT devices in the future, it may prove difficult to properly trust and authenticate these authorized devices on networks with current methods. Machine learning neural networks (NNs) have the ability to uniquely identify transmitters based on their physical waveform characteristics which could be used to identify and authenticate IoT nodes in large networks with little impact to latency, providing an extra layer of security and trust. This paper presents the groundwork for performing NN-based specific emitter identification (SEI) on resource constrained IoT devices using only raw in-phase and quadrature (IQ) streams, with protocols to secure IoT networks. As proof of concept, an existing NN-based SEI algorithm is executed on both a resource-rich and a more resource-constrained device with low latency, demonstrating the feasibility of using such algorithms on IoT devices now and in the future.

Many future wireless sensor networks will feature very high node density and low data rates per node as well as the desire for low latency and high network dependability. Existing medium access control (MAC) layer protocols, namely IEEE 802.15.4, may not be suitable for these networks due to their reliance on carrier sense multiple access with collision avoidance (CSMA-CA) contention processing. A modified IEEE 802.15.4 MAC protocol that supports a receiver-assigned code division multiple access (RA-CDMA) contention mechanism is modeled in this paper, and is shown to enable higher network scalability while improving network performance and contributing additional robustness against interferers. This paper focuses on a comparison of the contention mechanisms and the network scalability of IEEE 802.15.4 nonbeacon enabled mode and RA-CDMA, along with a MATLAB simulation framework used for end-to-end simulations of the protocols. Simulations suggest that IEEE 802.15.4 networks begin to break down in terms of throughput, latency, and delivery ratio at a relatively small overall network size compared to RA-CDMA networks. Results show that networks using the proposed RA-CDMA multiple access can support node densities approximately two to three times higher than IEEE 802.15.4 with minimal changes to the IEEE 802.15.4 MAC, in addition to lower latencies and improved interference mitigation.

In developing pseudorandom number generation mechanisms for low-power systems like the Internet of Things (IoT), there exists a large tradeoff between computational complexity and the resulting security enabled by the generator. For most communications applications, the use of any PRNG stream must be performed in a synchronizable, and sometimes invertible, fashion. This paper focuses on improvements to prior residue number space (RNS)-based PRNGs, configured to support extremely low-power IoT applications via internal dynamics like switching between PRNG components, simpler permutation-based mappings as opposed to pre-defined polynomials, dynamic indexing processes for improved multiple access operation, and computationally efficient sequence combination techniques. While similarly scalable to applications of prior RNS-based PRNGs, simulation and hardware prototyping results on an MSP430 and Altera FPGAs (Cyclone V and Arria 10) equally validate the suitability of the proposed PRNG techniques for microprocessor-level low-power implementations like industrial IoT.

Automotive data buses are increasingly important to modern vehicles. While the CAN bus has been the primary automotive bus since the 1980s, increasing connectivity and increasing reliance on electronics has created the demand for heterogeneous data buses. These systems provide lower cost, higher throughput, or better security than the CAN bus, but none of the buses include all of these characteristics. Due to the highly competitive nature of vehicle manufacturing, the vehicular data buses are being optimized to use each type of data bus where each of these characteristics are necessary. The LIN bus, which is the focus of this paper, is intended as a low cost data bus for connecting the increasing number of sensors and auxiliary systems that are not safety critical. Due to the desire to increase the safety of vehicles, the sensors are likely to impact the decisions of the vehicle about whether to employ automatic safety corrections (e.g., applying the brakes). As expected from the cost efficient design goals of the LIN bus, it is shown in this paper to be less expensive and less secure than other vehicular data buses. A description of the LIN bus, the security considerations, and future work to further inform LIN bus security are included.

The emergence of wireless networks consisting of large quantities of internet of things (IoT) devices has created the need for low-power multiple access communications protocols. The protocols employed for many of the current generation IoT devices are employing existing commercial standards, which often are optimized for very different purposes. In particular, the capability to simultaneously support low power operations and security is a challenge, indicative by the many compromises made in the adaptation of commercial protocols to IoT. This paper describes high order phase shift keying (PSK) signaling (HOPS) spread spectrum waveform techniques that echo secure military communications in many ways, yet are optimized for deployment in security-oriented battery-powered applications like industrial IoT, tire pressure monitoring systems (TPMS), and the emerging Wireless Avionics Intra-Communications (WAIC) standards. The paper presents results primarily through gate-level simulation models constructed in Simulink's HDL Coder toolbox, backed by hardware measurements on Altera Cyclone V SX SoC and Arria 10 SoC FPGAs.

The use of spread spectrum underlay signals has been widely proposed in cognitive radio contexts as a means to provide available spectrum for secondary users. Underlay signals are generally transmitted on a minimal interference basis to prevent disruption of the primary user(s). This paper proposes concepts for integrating the use of arbitrary, digitally modulated signals (primary) with time- and phase-synchronized, co-channel spread spectrum underlay signals, with the singular intent of increasing transmission security of the primary wireless signal via induced self-interference of the conjoined signals. These signals are separable given a priori knowledge of the underlay spreading code, yet remain masked to an uninformed observer. Simulation and proof-of-concept over-the-air results are provided, demonstrating practical feasibility of the approach, while future work will incorporate successive interference cancellation techniques and better quantify performance tradeoffs in hardware.

This paper introduces a novel digital chaotic circuit that is capable of supporting both the maximum entropy requirements of a chaotic communication system and the hardware efficiency requirements of practical implementations. Moreover, since the circuits implement a discrete-time discrete- amplitude chaotic mapping, the circuit is capable of overcoming the traditional "hard" problem of chaotic circuit synchronization in communication systems by mapping it to the well understood problem of timing synchronization. The efficiency gains of this circuit come from extrapolation of the traditional chaotic properties to closed Galois fields, finite residue number system (RNS) arithmetic, and truncated conversion to a weighted number system.