This paper proposes a space vector-based pulse width modulation scheme that incorporates common-mode voltage elimination and bus clamping for a dual six-phase inverter configuration driving an asymmetrical six-phase motor with open-end stator windings. The proposed scheme completely eliminates the common-mode voltage generated by both inverters. Additionally, the employed switching sequence enables bus clamping, which reduces switching losses compared to conventional patterns. The clamping strategy also ensures balanced power loss distribution among the switching devices. By eliminating the resultant common-mode voltage, the scheme allows for the use of a shared DC-link between the two inverters. Furthermore, it suppresses non-torque-producing harmonics in the stator windings of the ASPM and achieves higher DC bus utilization compared to conventional six-phase drive configurations. The effectiveness of the proposed scheme is validated through extensive simulations conducted in the MATLAB/Simulink environment.

The need for sinusoidal voltage waveforms with adjustable amplitude and frequency is essential in many applications. Power electronics converter-based supplies with pulse-width modulation (PWM) introduce high-order harmonics at their output and the use of filters is mandatory to remove the harmonic distortion. However, output filters are undesired in some specific applications such as B-H meter of magnetic devices because they act as the inverter output load together with the actual load affecting the measurement results. This paper explains the principles of operation and design considerations of a controlled AC power supply with nearly sinusoidal output. The proposed AC power supply consists of switching-mode DC-DC converters connected at the DC links of asymmetric cascaded H-bridges (ACHB). The proposed AC power supply offers a nearly sinusoidal output even at high-current low-voltage outputs. A modular compact 63-level supply is designed for the special case of the B-H meter and the simulation results are presented.

Proportional-resonant and repetitive controllers are widely used for grid current control in single-phase grid-connected inverters. This paper presents a comparative study of the performance of these two controller types in mitigating low-order harmonics with a descriptive analysis of their design. Moreover, low-order harmonics arising from the dead time in single-phase highly efficient and reliable inverter concept (HERIC) are investigated. Then, a novel scheme based on the harmonic decoupling network and second-order generalized integrator is designed to extract the low-order harmonics from the grid current. These extracted components are subtracted from the reference current to efficiently attenuate the low-order components. Experimental studies show an efficient mitigation of the low-order harmonics with the proposed scheme.

This paper introduces a new soft-switched high gain converter topology with Input Current Smoother (ICS) capability to mitigate Normalized Peak Inverse Voltage (NPIV). By employing soft switching techniques, the converter achieves significant reductions in switching losses and improved overall efficiency, making it ideal for high-frequency applications. The proposed converter enhances voltage gain while minimizing voltage stress on power semiconductors, overcoming the limitations of conventional step-up converters. The paper provides a detailed description of the converter's operation principles, configuration, and steady-state analysis. Performance comparisons with existing topologies demonstrate superior voltage gain, minimized voltage stress on semiconductors, negligible input current ripple, and remarkable efficiency. Finally, simulation results demonstrate the advantages of the proposed converter by using PSCAD software.

A virtual voltage vector based direct torque control (DTC) scheme with enhanced DC bus utilization for an asymmetrical six-phase induction motor (ASPIM) with open-end stator windings is proposed in this paper. In this scheme, the voltage vectors generated by two six-phase, two-level voltage source inverters (VSI) connected to both sides of the stator windings are combined to obtain a virtual voltage (VV) space vector structure in the ASPIM. While generating the virtual voltage vectors it is ensured that the following three conditions prevails in the system: 1) elimination of resultant common mode voltage (CMV) across the stator windings, 2) elimination of triplen order harmonic voltages from the individual 3-phase windings, and 3) nullification of non-torque producing harmonic voltages. Conditions 1 and 2 facilitate the use of a common DC-link for both the VSIs without causing circulation of common mode currents through the stator windings. The third condition obliterates the large, non-torque-producing harmonic currents and consequent losses in the system. The proposed scheme can provide significantly higher DC bus utilization compared to the conventional schemes, for the same DC-link voltage. The effectiveness of the proposed scheme is verified by carrying out simulations using MATLAB-Simulink software, under transient and steady-state operating conditions of the drive.

Voltage spikes during the switching transients play an important role in determining the power losses in hard-switching converters. These spikes are functions of several factors at the instant of switching such as DC-link voltage, load current, transistor and diode switching delay times, reverse recovery current of the diode, parasitic capacitance and inductance of the circuit. This paper introduces a numerical approach to accurately model the switching power losses of a single-phase H-bridge (SPHB) inverter. The data required to obtain the equivalent resistance is extracted from the experimental double-pulse tests (DPTs). Then, the concept of local and global rms currents is considered to incorporate the effect of pulse width modulation (PWM) in the estimation of the switching losses. The results are computed for unipolar and bipolar PWM schemes. Finally, the reflection rule is utilized to obtain an equivalent output resistance for the inverter switching losses.

We consider the tracking control problem for a class of stochastic nonlinear systems in strict-feedback structure via output feedback signal in this article. The controlled plant is assumed subject to unknown dead-zone input. By utilizing the fact that the unknown dead-zone input function can be modeled as a time-varying nonlinear function and a bounded disturbance, and selecting appropriate design parameters, we show that the effect of unknown dead zone can be compensated. We design a fuzzy state observer via fuzzy logic modeling technique to estimate the unknown system states. Then, we prove, via Lyapunov stability analysis, that the controlled plant is bounded in probability. In addition, all the signals in the closed-loop system are guaranteed to be globally bounded in probability. The tracking errors are also ensured to converge to a small neighborhood of the origin. Finally, to show the effectiveness of the proposed control strategy, a simulation example of one-link manipulator is presented in the simulation section.

Compared to bipolar, unipolar PWM (UPWM) is advantageous for switching the single-phase H-bridge inverter as it generates an output differential voltage with lower THD. However, the oscillatory nature of the common-mode voltage in UPWM contributes to the ground current in single-phase grid-connected PV inverters, which is the motivation of the various transformerless inverters with UPWM. Although, the benefits of UPWM (mainly the good characteristics of output differential voltage) in existing transformerless inverters is somehow missing. In this paper, after analyzing different switching schemes of HERIC (highly efficient and reliable inverter concept) converters, a modified UPWM is proposed in which the full sawtooth carrier and sinusoidal reference waveforms (changing between negative and positive maximums) are compared in order to increase the number of voltage pulses and reduce the THD of grid current. The superiority of the proposed UPWM has been confirmed by comparative simulation studies over a 1-kW single-phase grid-connected PV inverter.

In this paper, a software-based resolver to digital converter (RDC) is proposed. The hardware signal conditioning circuit is realized using common electronic components, while the algorithm can be implemented either using a microcontroller or an FPGA. Its validation and performance analysis has been carried out using an interior permanent magnet synchronous machine drive and, with comparative purposes, an LTN Servotechnik 1024 ppr incremental encoder. Tests show that the proposed RDC is characterized by a good dynamic response and precision, moreover, due to low computational demand, it can be successfully adopted without significant extra cost.

Cascaded H-Bridges Multilevel Inverters are an innovative and promising solution in different application fields. This topology allows obtaining an improvement in the performance (e.g. reduced harmonic content, the low voltage stress on power components, and high efficiency) in respect to the traditional two-level inverters. In this context, the Multicarrier-PWM strategies play an important role thanks to their features. This paper presents an experimental investigation on the performance of a three-phase five-level Cascaded H-Bridge inverter by using different PWM modulation strategies. In particular, the paper is focused on the experimental validation of the main features of Multicarrier PWM taken into account by varying the modulation index and the switching frequency.

This paper considers single phase seven-level cascaded H-bridge (CHB) inverters for Uninterruptible Power Supplies (UPS) applications and proposes a fundamental switching frequency procedure, based on graphic analysis, to improve the output waveform quality. It fixes the first switching angle and gets the other two by intersection of harmonics functions set to zero. The performances of the proposed procedure, in terms of total harmonic distortion (THD), are compared with those obtained by a procedure that identifies the two remain optimal switching angles through a THD minimization algorithm. Experimental results are obtained by measurements performed on a prototype built at DigiPower laboratory. The agreement between computed and experimental results confirms the accuracy of the presented procedure.

Multilevel converters prove to be well-suitable for high and medium voltage systems due to their lower cost and high-redundance design. For STATCOM, Single-star Bridge-cell (SSBC) topology is well applied for its satisfactory performance and superior component count. However, when number of levels increases, more switches are required to be parallelly controlled. Therefore, software-based microcontrollers (e.g. DSPs) shows limitations in terms of I/O built-in pins as well as performance. Alternatively, field programmable gate arrays (FPGAs), with their parallelism capability, are suitable for implementing control of SSBC-STATCOM. Multilevel SSBC-STATCOM control is composed of three layers which are output voltage control layer, internal current control layer and capacitor voltage balancing layer. A dq control based on PI regulators are commonly used for its simplicity and ease in implementation. In this work, detailed control design and implementation of SSBC-STATCOM using FPGA is discussed. Cyclone V FPGA with 50 MHz clock was used to implement control blocks and a hardware set-up of 142 V SSBC-STATCOM was designed to verify the results.

This paper proposes an efficient analytical harmonic elimination procedure valid for cascaded multilevel converters having s dc sources and a number of level l = 2s+1 with s = 2nn = 1,2,3, .... This procedure eliminates n+1 harmonics and their respective multiple; this implies a very low Total Harmonic Distortion. A 9-level inverter prototype is built and experimental results are obtained. The accuracy of the presented procedure is proved by the agreement between computed and experimental results.or, is observed.

With more installation of electronic loads and of distributed renewable energy sources, static compensators gain more interest to encounter the resulting power quality issues in low and medium voltage grids. Traditionally, two-level inverter topology, is utilized for this application, eventually with transformer at medium voltage. However, due to the low harmonics performance and the requirement for bulky filtering, the multilevel converters topologies become more attractive. Different topologies have been introduced during the last few decades and among the others, the Single-Star bridge cell is well applied to this application for its satisfactory performance and superior component count. Generally, the feasibility of adoption of static compensators for low and medium voltage systems relies strictly on their performance and cost-effectiveness. Theoretically, the harmonics performance improves with increasing the number of levels. However, this has a direct effect on their design and hence on their overall complexity and cost. In authors' knowledge, no paper has extensively discussed the impact of the number of levels on the cost of static compensators. Thus, this paper investigates some key factors in STATCOM design with emphasis on their impact on the overall cost in low and medium voltage applications.

Smart Grid improves the electricity grid infrastructure by introducing new powerful communication system between consumer and supplier. Implementation of smart meters increases the availability of detail level of consumer electricity load profile data. To improve and efficient planning and development of this new power system, a primary challenge is to analyze the electricity consumption data. To analyze the energy consumption or achieve our objective we choose the best analytic process is data mining techniques including exploratory data analysis and preprocessing, frequent patterns mining and associations, classification /characterization,clustering and outlier deduction. In this paper, we use these techniques and apply on two different public available datasets. Explain and evaluate which techniques is use full for the better understanding of electricity load profile consumption data.

One of the big concerns in power conversion systems is the amount of harmonic content. This paper considers a seven level cascaded inverter and proposes a simple graphical approach, useful to obtain three switching angles which, if applied to the inverter, eliminates two harmonics. The method has been further improved for mitigating some additional harmonics. The effect of modulation index on variation of angles is also investigated and total harmonic distortion (THD) is calculated for selected modulation indexes. The proposed modulation operates at fundamental frequency, which means high inverter efficiency due to reduced power losses. Simulation and experimental results are obtained to show the effectiveness of the proposed procedure.

In order to guarantee the proper operation of grid-connected power converters, a correct synchronization with utility networks is required to extract quickly and precisely the fundamental signal. This paper presents an experimental verification of the performance of an architecture called Generalized filtering Enhanced Phase-Locked Loop, proposed in [1] to detect the amplitude, the frequency and the phase of a sinusoidal signal from a noisy measurement. The considered application regards the synchronization of the power converters with the utility network. The GEPLL scheme is characterized by an error filter and a phase-feed forward term that are embedded in the estimation algorithm for improved noise rejection and transient performances. By properly selecting the transfer function of the error filter the transient dynamic performance is improved. The presence of measurement bias and the effect of high frequency noise and harmonics are taken into account by suitably selecting the parameters of the Phase Locked Loop. Both the single and three phase grid connected power inverter systems are considered. The comparison with the original Enhanced Phase- Locked Loop shows the superior performances of the proposed Generalized filtering Enhanced Phase-Locked Loop.

This paper presents an overview and experimental analysis of the MC SPWM techniques for single-phase cascaded H-bridge inverter. The multilevel power converters are an alternative to traditional converters known as “three-level converters”. The voltage waveforms and the related frequency spectra, which have been obtained by simulation analysis in Matlab-Simulink environment, are here reported for all the proposed modulation techniques. The simulation results have been experimentally validated through means of a DC/AC, five-level, single-phase converter prototype with an appropriate test bench.

This paper investigates about the impact of the number of levels and of the corresponding modulations angles on the mitigation of harmonics in cascaded H-bridge multilevel inverters. A mathematical model to reduce Nth odd harmonics from the output voltage of a multilevel converter is represented as a constrained optimization problem. It is further transformed in an unconstrained optimization problem that can be solved more simply by using the particle swarm optimization method. By varying the modulation index, the procedure guarantees the constancy of the output voltage amplitude.

In this paper, a grid connected shunt converter for mitigation of voltage sags in weak grids is described. The VSC keeps the grid voltage magnitude at the point of connection constant by injecting reactive power to compensate for the voltage dip. A novel flatness-based control (FBC) is proposed for this purpose that gives higher performance and robustness with an inductor/capacitor/inductor (LCL)-filter in between the VSC and the grid. Simulation model includes the practical limitation of voltage source converter output voltage. Then, the simulation results for the FBC under balanced voltage dips are presented and compared with traditional proportional integral controller. Finally, the sensitivity analysis of the FBC for grid impedance and to system parameter variations is presented.

A deterministic algorithm aiming at reduction of harmonic content in three phase, five-level cascaded inverters is proposed. The procedure starts from a non-linear system consisting of disequations and, using Chebyshev polynomials and Waring's formula, for any assigned modulation index computes those switching angles α1and α2reducing harmonics amplitude such as to fulfill grid code specifications. Simulation and experimental results demonstrate the achievable results.

Information and communication technologies (ICT) represent a fundamental element in the growth and performance of smart grids. A sophisticated, reliable and fast communication infrastructure is, in fact, necessary for the connection among the huge amount of distributed elements, such as generators, substations, energy storage systems and users, enabling a real time exchange of data and information necessary for the management of the system and for ensuring improvements in terms of efficiency, reliability, flexibility and investment return for all those involved in a smart grid: producers, operators and customers. This paper overviews the issues related to the smart grid architecture from the perspective of potential applications and the communications requirements needed for ensuring performance, flexible operation, reliability and economics.

If properly controlled, LLC resonant converters can achieve zero voltage switching (ZVS) over the entire operating range, thus minimizing switching losses of the power MOSFETs and secondary diodes. For such a reason, this paper presents and compare a half bridge LLC resonant converter controlled by both an adaptive PID and a fuzzy logic controller (FLC). For obtaining the DC voltage transfer function, an analysis tool, the so called Fundamental Harmonic Approximation (FHA) method has been adopted. FHA is also used to determine circuit parameters and for predicting the transient response of the converter during sudden changes of input and load, which is then verified through simulations and laboratory measurements.

Power converters offer a high capability to efficiently manage electrical energy flows. Until a few years ago, their primary use was in supplying motors in industrial applications and in electric traction systems. Nowadays, in addition to those fields they are employed in a very wide range of low, medium, and high power applications including residential applications, renewable energy systems, distributed generation, and automotive. Since digital control represents a key element of modern power converters, this paper presents a review on digital devices [microcontrollers, Field Programmable Gate Arrays (FPGA)], hardware and software design techniques as well as implementation issues useful for designing modern high-performance power converters.

For 100 years, there has been no change in the basic structure of the electrical power grid. Experiences have shown that the hierarchical, centrally controlled grid of the 20th Century is ill-suited to the needs of the 21st Century. To address the challenges of the existing power grid, the new concept of smart grid has emerged. The smart grid can be considered as a modern electric power grid infrastructure for enhanced efficiency and reliability through automated control, high-power converters, modern communications infrastructure, sensing and metering technologies, and modern energy management techniques based on the optimization of demand, energy and network availability, and so on. While current power systems are based on a solid information and communication infrastructure, the new smart grid needs a different and much more complex one, as its dimension is much larger. This paper addresses critical issues on smart grid technologies primarily in terms of information and communication technology (ICT) issues and opportunities. The main objective of this paper is to provide a contemporary look at the current state of the art in smart grid communications as well as to discuss the still-open research issues in this field. It is expected that this paper will provide a better understanding of the technologies, potential advantages and research challenges of the smart grid and provoke interest among the research community to further explore this promising research area.