Demo Data from EDBT 2026 / reviewers in the wild / expert
Leszek J. Opalski
dblp:10/2734
· DBLP profile ↗
6ranked-venue papers
2as first author
0since 2021 · last 1995
0000-0003-4492-7134ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
design for manufacturability |
0.0 | 2 | 1986 | Algorithms and Software Tools for IC Yield Optimization Based on Fundamental Fabrication Parameters · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 Generalization of Yield Optimization Problem: Maximum Income Approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 |
Electronic design automation › design for manufacturability › design for yield
yield enhancement |
0.0 | 2 | 1986 | Algorithms and Software Tools for IC Yield Optimization Based on Fundamental Fabrication Parameters · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 Generalization of Yield Optimization Problem: Maximum Income Approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 |
Electronic design automation › design optimization
circuit design optimization |
0.0 | 1 | 1986 | Generalization of Yield Optimization Problem: Maximum Income Approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 |
Electronic design automation › technology computer-aided design
statistical process simulation |
0.0 | 1 | 1986 | Algorithms and Software Tools for IC Yield Optimization Based on Fundamental Fabrication Parameters · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 |
Methods — techniques the papers use, named apart from their topics
stochastic approximation · 0.0method of random perturbations · 0.0gradient-based optimization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1995 | Decomposition-Based Model Parameter ExtractionabstractThis paper presents a decomposition-based approach to model parameter extraction. The new parameter extraction technique combines virtues of sequential regression and full optimization approaches. Extraction of the SPICE2 BJT model parameters illustrates concepts and advantages of the proposed method. Katarzyna Opalska, Leszek J. Opalski |
ISCAS | 2 |
| 1995 | From Circuit to Mechatronic System Tolerance OptimizationabstractThis paper introduces a method for the worst case design of engineering systems, provided that the design problem is formulated in an algorithmic manner. Applicability of the Piecewise Ellipsoidal Approximation (PEA) to the constraint region, originally developed for electronic circuits, is extended in this paper. A two level algorithm for the worst case design, exploiting the properties of ellipsoidal functions, is introduced. A benchmark example of the worst case design of the fourth order servomechanism is effectively solved. Jacek Wojciechowski, Leszek J. Opalski, Krzysztof Zamlynski |
ISCAS | 2 |
| 1995 | Applications of the Piecewise Ellipsoidal Approximation to the Design of Nonlinear CircuitsabstractThe paper tests the piecewise ellipsoidal approximation technique applied to the constraints region. The technique, which was originally developed and checked for linear circuits, was confronted with optimal design problems of nonlinear circuits. Results of accuracy verifications are presented. Applications of the approximation technique to the solution of worst-case and yield oriented design centering problems are discussed. Test optimal design problems of nonlinear circuits are solved. Jacek Wojciechowski, Leszek J. Opalski, Krzysztof Zamlynski |
ISCAS | 2 |
| 1994 | Application of the Piecewise Ellipsoidal Approximation Technique to Design CenteringabstractA new worst case design algorithm for box-type tolerance region is presented. It employs specific properties of the piecewise ellipsoidal approximation of the acceptability region. The two-level optimizer uses a 2-phase feasible directions algorithm at the upper level and a combination of a projected gradient technique and a special purpose global optimization algorithm at the lower level. Optimization results on some standard problems illustrate concepts and efficiency.> Leszek J. Opalski, Jacek Wojciechowski |
ISCAS | 1 |
| 1986 | Generalization of Yield Optimization Problem: Maximum Income ApproachabstractAn approach to statistical design centering (SDC) based on a simple generalization of the production yield concept is introduced, leading to a new figure of merit called the "income index." The measure can be considered as a simple model of the manufacturer's income or as a parameter characterizing the average quality of the manufacturing process. The income index takes into account the "price" (or "quality") decrease of inferior and the "price" (or "quality") increase of superior designs. The method is especially effective in improving quality of the designs characterized by large production yield. It can also handle the problems where the circuit specifications are negotiable or not exactly known, thus extending the area of SDC applications. For the implementation of the proposed method the existing gradient algorithms of yield optimization can be used after only minor modifications of gradient calculating subroutines and practically negligible additional computational costs. Leszek J. Opalski, M. A. Styblinski |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 1986 | Algorithms and Software Tools for IC Yield Optimization Based on Fundamental Fabrication ParametersabstractAlgorithms, software tools and the relevant methodology for production yield optimization with respect to fundamental technological parameters of the IC manufacturing process (such as diffusion times and temperatures) and element layout mask dimensions are discussed. The tools developed include: STOCH-PAC--a package of new yield optimization and yield gradient estimation algorithms based on Stochastic Approximation approach and the Method of Random Perturbations; YIELD-PAC - a package of yield evaluation subroutines providing an interface to SPICE-PAC circuit simulation package; FABPAC - an interface to the FABRICS statistical process simulator; and IRIS (Interactive Restructurable Interface System)--a flexible user interface for efficient data manipulation, creation of different design tasks and macrotasks, restructuring the set of active subroutines, etc. These tools have been integrated into the TOY (Technological Optimization of Yield) program. Examples of yield optimization with respect to process parameters and layout dimensions using TOY are given. M. A. Styblinski, Leszek J. Opalski |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |