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Mishra Suman

dblp:10/3538 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2004
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 75% Processor architecture and microarchitecture · 25%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
computer arithmetic		 0.012004
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System · IEEE Trans. Computers 2004
Integrated circuit design
digital circuit design		 0.012004
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System · IEEE Trans. Computers 2004
Integrated circuit design › digital arithmetic circuits
sign detection		 0.012004
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System · IEEE Trans. Computers 2004
Integrated circuit design
VLSI design		 0.012004
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System · IEEE Trans. Computers 2004

Methods — techniques the papers use, named apart from their topics

reverse tree structure · 0.0
YearPublicationVenuePosition
2004 Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System
abstract
Computer arithmetic operations based on the BSD (binary signed-digit) number representation system lend themselves well to high-speed computations due to the facilitation of limited carry addition/subtraction. We propose an area-time efficient method for sign detection in a BSD number system based on optimized reverse tree structure. When compared to other popular approaches, such as the most significant carry detection-based CLA (carry look-ahead) and MRC (multilevel reverse carry) implementations, the proposed method is superior to both area and time costs in VLSI. Synthesis results for different word lengths show that the proposed approach to sign detection in the BSD number system continues to maintain its advantage over area and time measures.
Thambipillai Srikanthan, Siew-Kei Lam, Mishra Suman
 IEEE Trans. Computers3