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Claude Pommerell

dblp:10/6299 · DBLP profile ↗
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4ranked-venue papers
1as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
High-performance computing · 36% Performance modeling and evaluation · 21% Electronic design automation · 18%
Theoretical computer science
2 papers
Mathematical optimization · 100%

Topics — the 13 heaviest of 15, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing › numerical linear algebra › linear solver
iterative linear solvers
0.011991
PILS: an iterative linear solver package for ill-conditioned systems · SC 1991
High-performance computing
large-scale simulation
0.011991
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
High-performance computing
numerical linear algebra
0.011991
PILS: an iterative linear solver package for ill-conditioned systems · SC 1991
High-performance computing
scientific computing systems
0.011991
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Electronic design automation › technology computer-aided design
semiconductor device simulation
0.011991
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Electronic design automation
technology computer-aided design
0.011991
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Interconnection networks and networks-on-chip
network topology
0.021989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
K9: a simulator of distributed-memory parallel processors · SC 1989
Performance modeling and evaluation › network performance analysis
interconnection network performance
0.011989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
Performance modeling and evaluation
simulation
0.011989
K9: a simulator of distributed-memory parallel processors · SC 1989
Performance modeling and evaluation › simulation
simulation-based evaluation
0.011989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
Interconnection networks and networks-on-chip › network topology
torus network
0.011989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
Mathematical optimization › numerical computation
preconditioned iterative solver
0.011991
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Parallel and multicore computing › multiprocessor system
distributed memory parallel processors
0.011989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989

Methods — techniques the papers use, named apart from their topics

ordering and coloring · 0.0drift-diffusion equations · 0.0coupled and noncoupled schemes · 0.0simulation · 0.0discrete-event simulation · 0.0
YearPublicationVenuePosition
1991 PILS: an iterative linear solver package for ill-conditioned systems
Claude Pommerell, Wolfgang Fichtner
SC1
1991 Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results
abstract
The authors present SECOND, a program for large-scale semiconductor device simulation with truly three-dimensional grids. Since 3-D simulations necessitate large computing resources, the choice of algorithms and their implementation become of utmost importance. The authors investigated the most commonly used numerical algorithms for the solution of the classical drift-diffusion equations. The study included coupled and noncoupled point and block schemes, direct and preconditioned iterative linear solvers, and several distinct ordering and coloring techniques. Structures with regular and irregular grids were analyzed. These algorithms were compared on a variety of machines including workstations, minisupers, and supercomputers. Results of transient simulations are presented to illustrate the approach.>
Gernot Heiser, Claude Pommerell, Jürgen Weis, Wolfgang Fichtner
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1989 Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors
abstract
We have simulated several numerical and non-numerical algorithms on five distributed-memory parallel processors (DMPPs). All five DMPPs have the same topology (a torus), and the same number of nodes. The architectures differ only in the communication speed between neighboring nodes, while the computation unit is kept unchanged. The goal of the paper is to quantify the effect that interprocessor communication speed and synchronization overhead have on the performance of the DMPPs. After introducing the rationale for this study and reviewing related work, we present and discuss the results of the simulations.
Marco Annaratone, Claude Pommerell, Roland Rühl
ISCA2
1989 K9: a simulator of distributed-memory parallel processors
abstract
K9 is a software package for the simulation and performance evaluation of distributed-memory parallel processors (DMPPs). It is written in C++ and runs on Sequent Symmetry and SUN-3. K9 provides the user with four building-blocks (processor cells, communication channels, multi-port shared-memories, and I/O processors), and one abstraction mechanism (the DMPP interconnection topology). Application code for K9 can be written in C++ or C.
Peter Beadle, Claude Pommerell, Marco Annaratone
SC2