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Kyoung-Soo We

dblp:10/8927 · DBLP profile ↗
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4ranked-venue papers
2as first author
0since 2021 · last 2017
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 2 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Embedded and real-time systems · 55% Storage systems · 23% Performance modeling and evaluation · 17%

Topics — the 9 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems
automotive systems
0.312017
Functionally and Temporally Correct Simulation of Cyber-Systems for Automotive Systems · RTSS 2017
Embedded and real-time systems
cyber-physical systems
0.312017
Functionally and Temporally Correct Simulation of Cyber-Systems for Automotive Systems · RTSS 2017
Performance modeling and evaluation
simulation
0.312017
Functionally and Temporally Correct Simulation of Cyber-Systems for Automotive Systems · RTSS 2017
Storage systems
flash and SSD
0.212014
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory · IEEE Trans. Computers 2014
Embedded and real-time systems › real-time scheduling
hard real-time scheduling
0.212014
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory · IEEE Trans. Computers 2014
Storage systems › flash and SSD › flash memory
NAND flash
0.212014
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory · IEEE Trans. Computers 2014
GPUs and heterogeneous computing
preemption
0.112017
Functionally and Temporally Correct Simulation of Cyber-Systems for Automotive Systems · RTSS 2017
Embedded and real-time systems
real-time scheduling
0.112017
Functionally and Temporally Correct Simulation of Cyber-Systems for Automotive Systems · RTSS 2017
Embedded and real-time systems
automotive embedded systems
0.112014
HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory · IEEE Trans. Computers 2014

Methods — techniques the papers use, named apart from their topics

scheduling · 0.3discrete-event simulation · 0.3paging scheme · 0.2RAM partitioning · 0.2
YearPublicationVenuePosition
2017 Functionally and Temporally Correct Simulation of Cyber-Systems for Automotive Systems
abstract
The current simulation tools used in the automotive industry do not correctly model timing behaviors of cyber-systems such as varying execution times and preemptions. Thus, they cannot correctly predict the real control performance. Motivated by this limitation, this paper proposes functionally and temporally correct simulation for the cyber-side of an automotive system. The key idea is to keep the data and time correctness only at physical interaction points and enjoy freedom of scheduling simulated jobs for all other cases. This way, the proposed approach significantly improves the real-time simulation capacity of the state-of-the-art simulation methods while keeping the functional and temporal correctness.
Kyoung-Soo We, Seunggon Kim, Chang-Gun Lee
RTSS1
2014 HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory
abstract
For advanced features of next generation vehicles, the real-time programs in automotive embedded systems are dramatically increasing. For such large volume program codes, this paper proposes a novel framework to use high-density and low-cost nonvolatile memory, i.e., NAND flash memory, as a low-cost means of storing and executing hard real-time programs. Regarding this, one challenge is that NAND flash memory allows only 2 KB page-based read operations not per-byte random accesses, which requires RAM as working storage for code executions. This paper proposes two solutions, i.e., partitioned RAM solution and shared RAM solution, that minimize the RAM size required to deterministically guarantee the deadlines of all the hard real-time tasks. The proposed solutions are verified with the actual real-time programs for unmanned autonomous driving. To the best of our knowledge, this is the first work that allows us to use NAND flash memory for hard real-time program executions with the minimal usage of RAM.
Kyoung-Soo We, Chang-Gun Lee, Kyongsu Yi, Kwei-Jay Lin, Yun Sang Lee
IEEE Trans. Computers1
2011 HW Resource Componentizing for Addressing the Mega-complexity of Cyber-physical Systems
abstract
Emerging cyber-physical systems (CPSs) demand a new computing abstraction since the traditional ones have fundamental limitations in handling the para-functional also called physical requirements of CPSs such as timeliness, reliability, and evolvability. With the traditional computing abstractions such as processes, virtual memory, etc., multiple software (SW) components share hardware (HW) resources such as CPU and memory in a competitive manner causing unpredictable interferences in the para-functional properties. This problem becomes more serious along with the ever increasing scale and complexity of newly emerging cyber-physical systems. To fundamentally solve this problem, this paper proposes a HW resource componentizing approach that chops the capacity of a HW resource into smaller ones called HW components and dedicates a HW component to each SW component. With the dedicated HW component, each SW component can be guaranteed with the isolated para-functional properties regardless of surrounding SW components. This makes the system-wide issue of validating timeliness, reliability, and evolvability into the per-component validation issue. With this vision, this paper briefly presents a spatial/temporal-division scheduling algorithm that can be generally used for componentizing various HW resources including CPU, network, and RAM.
Jongchan Kim 0001, Kyoung-Soo We, Chang-Gun Lee
RTCSA (2)2
2010 Using NAND flash memory for executing large volume real-time programs in automotive embedded systems
abstract
For advanced features of next generation vehicles, the real-time programs in automotive embedded systems are dramatically increasing. For such large volume program codes, this paper proposes a novel framework to use high-density and low-cost nonvolatile memory, i.e., NAND flash memory, as a low-cost mean of storing and executing hard real-time programs. Regarding this, one challenge is that NAND flash memory allows only 2KB page-based read operations not per-byte random access, which requires RAM as working storage for code executions. In order to minimize the expensive RAM requirements, the proposed framework optimally partitions the RAM for multiple hard real-time tasks and optimally determines the pinning/LRU combination for each RAM partition such that all task deadlines are deterministically guaranteed. The proposed framework is verified with the actual real-time programs for unmanned autonomous driving. To the best of our knowledge, this is the first work that allows us to use NAND flash memory for hard real-time program executions with the minimal usage of RAM.
Kwangyoon Cho, Kyoung-Soo We, Chang-Gun Lee, Kanghee Kim
EMSOFT2