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Domitian Tamas-Selicean

dblp:11/10802 · DBLP profile ↗
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8ranked-venue papers
7as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 3 first-authorSecurity and privacy · 2 · 2 first-authorSoftware engineering, systems software and programming languages · 2 · 2 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 60% Processor architecture and microarchitecture · 20% Electronic design automation · 20%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
design optimization
0.112011
Design Optimization of Mixed-Criticality Real-Time Applications on Cost-Constrained Partitioned Architectures · RTSS 2011
Embedded and real-time systems › real-time scheduling
mixed-criticality scheduling
0.112011
Design Optimization of Mixed-Criticality Real-Time Applications on Cost-Constrained Partitioned Architectures · RTSS 2011
Processor architecture and microarchitecture
partitioned architecture
0.112011
Design Optimization of Mixed-Criticality Real-Time Applications on Cost-Constrained Partitioned Architectures · RTSS 2011
Embedded and real-time systems
real-time scheduling
0.112011
Design Optimization of Mixed-Criticality Real-Time Applications on Cost-Constrained Partitioned Architectures · RTSS 2011
Embedded and real-time systems › multicore real-time systems
task mapping and scheduling
0.112011
Design Optimization of Mixed-Criticality Real-Time Applications on Cost-Constrained Partitioned Architectures · RTSS 2011

Methods — techniques the papers use, named apart from their topics

tabu search · 0.1
YearPublicationVenuePosition
2015 Timing Analysis of Rate Constrained Traffic for the TTEthernet Communication Protocol
abstract
Ethernet is a low-cost communication solution offering high transmission speeds. Although its applications extend beyond computer networking, Ethernet is not suitable for real-time and safety-critical systems. To alleviate this, several real-time Ethernet-based communication protocols have been proposed, such as TTEthernet, which is the focus of this paper. TTEthernet is suitable for mixed-criticality systems both in the safety and temporal domain. TTEthernet offers three traffic classes: static time-triggered (TT) traffic, dynamic traffic with bounded transmission rate (called "Rate Constrained", RC), and unbounded dynamic traffic ("Best-Effort", BE). In this paper we propose a novel worst-case end-to-end delay analysis of the RC traffic for TTEthernet systems. The proposed technique considerably reduces the pessimism of the analysis, compared to existing approaches. We have evaluated the new analysis using several test cases.
Domitian Tamas-Selicean, Paul Pop, Wilfried Steiner
ISORC1
2015 Design optimization of TTEthernet-based distributed real-time systems
Domitian Tamas-Selicean, Paul Pop, Wilfried Steiner
Real Time Syst.1
2015 Design Optimization of Mixed-Criticality Real-Time Embedded Systems
abstract
In this article, we are interested in implementing mixed-criticality real-time embedded applications on a given heterogeneous distributed architecture. Applications have different criticality levels, captured by their Safety-Integrity Level (SIL), and are scheduled using static-cyclic scheduling. According to certification standards, mixed-criticality tasks can be integrated onto the same architecture only if there is enough spatial and temporal separation among them. We consider that the separation is provided by partitioning, such that applications run in separate partitions, and each partition is allocated several time slots on a processor. Tasks of different SILs can share a partition only if they are all elevated to the highest SIL among them. Such elevation leads to increased development costs, which increase dramatically with each SIL. Tasks of higher SILs can be decomposed into redundant structures of lower SIL tasks. We are interested to determine (i) the mapping of tasks to processors, (ii) the assignment of tasks to partitions, (iii) the decomposition of tasks into redundant lower SIL tasks, (iv) the sequence and size of the partition time slots on each processor, and (v) the schedule tables, such that all the applications are schedulable and the development costs are minimized. We have proposed a Tabu Search-based approach to solve this optimization problem. The proposed algorithm has been evaluated using several synthetic and real-life benchmarks.
Domitian Tamas-Selicean, Paul Pop
ACM Trans. Embed. Comput. Syst.1
2014 Optimization of TTEthernet networks to support best-effort traffic
abstract
This paper focuses on the optimization of the TTEthernet communication protocol, which offers three traffic classes: time-triggered (TT), sent according to static schedules, rate-constrained (RC) that has bounded end-to-end latency, and best-effort (BE), the classic Ethernet traffic, with no timing guarantees. In our earlier work we have proposed an optimization approach named DOTTS that performs the routing, scheduling and packing / fragmenting of TT and RC messages, such that the TT and RC traffic is schedulable. Although backwards compatibility with classic Ethernet networks is one of TTEthernet's strong points, there is little research on this topic. However, in this paper, we extend our DOTTS optimization approach to optimize TTEthernet networks, such that not only the TT and RC messages are schedulable, but we also maximize the available bandwidth for BE messages. The proposed optimization has been evaluated on a space application case study.
Domitian Tamas-Selicean, Paul Pop
ETFA1
2014 Optimization of Partitioned Architectures to Support Soft Real-Time Applications
abstract
In this paper we propose a new Tabu Search-based design optimization strategy for mixed-criticality systems implementing hard and soft real-time applications on the same platform. Our proposed strategy determined an implementation such that all hard real-time applications are schedulable and the quality of service of the soft real-time tasks is maximized. We have evaluated our strategy using an aerospace case study.
Domitian Tamas-Selicean, Paul Pop
PRDC1
2012 Timing analysis of mixed-criticality hard real-time applications implemented on distributed partitioned architectures
abstract
In this paper we are interested in the timing analysis of mixed-criticality embedded real-time applications mapped on distributed heterogeneous architectures. Mixed-criticality tasks can be integrated onto the same architecture only if there is enough spatial and temporal separation among them. We consider that the separation is provided by partitioning, such that applications run in separate partitions, and each partition is allocated several time slots on a processor. Each partition can have its own scheduling policy. We are interested to determine the worst-case response times of tasks scheduled in partitions using fixed-priority preemptive scheduling. We have extended the state-of-the-art algorithms for schedulability analysis to take into account the partitions. The proposed algorithm has been evaluated using several synthetic and real-life benchmarks.
Sorin Ovidiu Marinescu, Domitian Tamas-Selicean, Vlad Acretoaie, Paul Pop
ETFA2
2011 Task Mapping and Partition Allocation for Mixed-Criticality Real-Time Systems
abstract
In this paper we address the mapping of mixedcriticality hard real-time applications on distributed embedded architectures. We assume that the architecture provides both spatial and temporal partitioning, thus enforcing enough separation between applications. With temporal partitioning, each application runs in a separate partition, and each partition is allocated several time slots on the processors where the application is mapped. The sequence of time slots for all the applications on a processor are grouped within a Major Frame, which is repeated periodically. We assume that the applications are scheduled using static-cyclic scheduling. We are interested to determine the task mapping to processors, and the sequence and size of the time slots within the Major Frame on each processor, such that the applications are schedulable. We have proposed a Tabu Search-based approach to solve this optimization problem. The proposed algorithm has been evaluated using several synthetic and real-life benchmarks.
Domitian Tamas-Selicean, Paul Pop
PRDC1
2011 Design Optimization of Mixed-Criticality Real-Time Applications on Cost-Constrained Partitioned Architectures
abstract
In this paper we are interested to implement mixed-criticality hard real-time applications on a given heterogeneous distributed architecture. Applications have different criticality levels, captured by their Safety-Integrity Level (SIL), and are scheduled using static-cyclic scheduling. Mixed-criticality tasks can be integrated onto the same architecture only if there is enough spatial and temporal separation among them. We consider that the separation is provided by partitioning, such that applications run in separate partitions, and each partition is allocated several time slots on a processor. Tasks of different SILs can share a partition only if they are all elevated to the highest SIL among them. Such elevation leads to increased development costs. We are interested to determine (i) the mapping of tasks to processors, (ii) the assignment of tasks to partitions, (iii) the sequence and size of the time slots on each processor and (iv) the schedule tables, such that all the applications are schedulable and the development costs are minimized. We have proposed a Tabu Search-based approach to solve this optimization problem. The proposed algorithm has been evaluated using several synthetic and real-life benchmarks.
Domitian Tamas-Selicean, Paul Pop
RTSS1