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Stefan Rieger

dblp:11/1679 · DBLP profile ↗
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5ranked-venue papers
1as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Theory of computation · 3 · 1 first-authorSystems, architecture and hardware · 1Security and privacy · 1Software engineering, systems software and programming languages · 1Databases, data management, data science and information retrieval · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Program verification · 50% Programming languages and type systems · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Program verification
concurrent program verification
0.112008
Verifying Dynamic Pointer-Manipulating Threads · FM 2008
Programming languages and type systems
pointer manipulation
0.112008
Verifying Dynamic Pointer-Manipulating Threads · FM 2008

Methods — techniques the papers use, named apart from their topics

thread verification · 0.1
YearPublicationVenuePosition
2015 Model-Based Analysis for Safety Critical Software
Stefan Gulan, Jens Harnisch, Sven Johr, Roberto Kretschmer, Stefan Rieger, Rafael Zalman
SAFECOMP5
2013 Graphical modelling meets formal methods
abstract
The graphical modelling languages UML and SysML, nowadays widely used in industry, integrate different modelling concepts and notations in one standardised framework. However, they lack a clearly defined, unambiguous semantics and thus their formal verification represents a challenge. On the other hand, current safety standards, including ISO 26262, demand such verification especially for safety-relevant systems. The literature proposes a plethora of different semantics and formalisms for UML/SysML. In this paper we compare and summarise existing work on the formalisation of behavioural UML and SysML models and their verification. Our goal is to foster a better understanding of the problems related to UML/SysML formalisation, and to aid people bridging the gap from high level graphical modelling to formal verification techniques.
Stefan Gulan, Sven Johr, Roberto Kretschmer, Stefan Rieger, Michael Ditze
INDIN4
2008 Verifying Dynamic Pointer-Manipulating Threads
Thomas Noll 0001, Stefan Rieger
FM2
2008 Abstracting Complex Data Structures by Hyperedge Replacement
Stefan Rieger, Thomas Noll 0001
ICGT1
2007 Composing Transformations to Optimize Linear Code
Thomas Noll 0001, Stefan Rieger
ICTAC2