A testable design of a programmable m-out-of-n code checker is reported in this paper. The checker is modular in nature and can be easily extended by cascading. Basically, a cellular automaton (CA) structure is taken whose combinational logic port (CL-part) is modified in such a way that all the 1's in the initial state (seed) get accumulated in the rightmost cells. This CA is then transformed into an iterative array of combinational logic cells. To make the resulting structure testable for all stuck-at and unidirectional faults, it is partitioned into a number of identical blocks the outputs of which are combined to produce two complementary outputs.

The present paper reports a novel scheme for designing fast retrieval memory system using cellular automata. In essence, the proposed scheme implements the concept of hashing in hardware. This makes possible the design of low-cost high-capacity memory systems with limited content addressability as an option. The efficiency of the scheme has been verified through extensive simulation studies of the hardwired hashing function built around 1D and 2D linear cellular automata (CA).>

A new scheme for designing error detecting and error correcting codes around cellular automata (CA) is reported. A simple and efficient scheme for generating SEC-DED codes is presented which can also be extended for generating codes with higher distances. A CA-based hardware scheme for very fast decoding (and correcting) of the codewords is also reported.>