Demo Data from EDBT 2026 / reviewers in the wild / expert
Akira Fusaoka
dblp:11/3504
· DBLP profile ↗
9ranked-venue papers
5as first author
0since 2021 · last 2009
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 4 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 4 · 1 first-authorDatabases, data management, data science and information retrieval · 2 · 2 first-authorTheory of computation · 2 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Artificial intelligence
1 paper |
Knowledge representation and reasoning · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% | |
| Theoretical computer science
1 paper |
Automata and formal languages · 50% Logic in computer science · 50% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 8 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Knowledge, reasoning and agents › Knowledge representation and reasoning › reasoning about action and change
reasoning about actions |
0.0 | 1 | 1983 | A Description and Reasoning of Plant Controllers in Temporal Logic · IJCAI 1983 |
Knowledge, reasoning and agents › Knowledge representation and reasoning › logic in computer science › logical foundations › non-classical logics
temporal logic |
0.0 | 1 | 1983 | A Description and Reasoning of Plant Controllers in Temporal Logic · IJCAI 1983 |
Integrated circuit design
VLSI design |
0.0 | 1 | 1982 | Compiler Chip: A Hardware Implementation of Compiler · ASPLOS 1982 |
Knowledge, reasoning and agents › Knowledge representation and reasoning
logic-based reasoning |
0.0 | 1 | 1983 | A Description and Reasoning of Plant Controllers in Temporal Logic · IJCAI 1983 |
Knowledge, reasoning and agents › Knowledge representation and reasoning
temporal reasoning |
0.0 | 1 | 1983 | A Description and Reasoning of Plant Controllers in Temporal Logic · IJCAI 1983 |
Compilers and program optimization
compiler construction |
0.0 | 1 | 1982 | Compiler Chip: A Hardware Implementation of Compiler · ASPLOS 1982 |
Logic in computer science
decomposition theorem |
0.0 | 1 | 1971 | A Note on a Decomposition Theorem for Simple Deterministic Languages · Inf. Control. 1971 |
Automata and formal languages › context-free languages
deterministic context-free languages |
0.0 | 1 | 1971 | A Note on a Decomposition Theorem for Simple Deterministic Languages · Inf. Control. 1971 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2009 | An Analysis of the Fuller Phenomenon on Transfinite Hybrid Automata
Katsunori Nakamura, Akira Fusaoka |
HSCC | 2 |
| 2004 | On Description and Reasoning About Hybrid Systems
Katsunori Nakamura, Akira Fusaoka |
IEA/AIE | 2 |
| 2002 | On a Model-Based Design Verificationfor Combinatorial Boolean Networks
Satoshi Hiratsuka, Akira Fusaoka |
IEA/AIE | 2 |
| 2000 | On a Model-Based Diagnosis for Synchronous Boolean Netowrk
Satoshi Hiratsuka, Akira Fusaoka |
IEA/AIE | 2 |
| 1987 | Basic research on artificial intelligence at Mitsubishi Electric
Akira Fusaoka |
Artif. Intell. Eng. | 1 |
| 1986 | On a mechanical reasoning about causal relations
Akira Fusaoka, Kazuko Takahashi 0001 |
Artif. Intell. Eng. | 1 |
| 1983 | A Description and Reasoning of Plant Controllers in Temporal Logic
Akira Fusaoka, Hirohisa Seki, Kazuko Takahashi 0001 |
IJCAI | 1 |
| 1982 | Compiler Chip: A Hardware Implementation of CompilerabstractIn this paper we discuss about another approch: Compiler Chip, which is a VLSI implementation of a compiler. Constructing a compiler by a few VLSI chip, the computer manufacturer can deliver compilers by sets of VLSI chips, and these chips are installed in a intelligent terminal in order to remove the compilation from the tasks which are processed in the mainframe. Akira Fusaoka, Masaharu Hirayama |
ASPLOS | 1 |
| 1971 | A Note on a Decomposition Theorem for Simple Deterministic Languages
Akira Fusaoka |
Inf. Control. | 1 |