Alexei Iliasov

dblp:11/4579 · also Alex Iliasov · DBLP profile ↗
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25ranked-venue papers
14as first author
6since 2021 · last 2025
0000-0003-1153-9581ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 13 · 7 first-author · 1 since 2021Security and privacy · 5 · 5 first-author · 2 since 2021Theory of computation · 4 · 3 since 2021Applied, interdisciplinary, general and emerging computing · 3 · 2 first-author · 1 since 2021Systems, architecture and hardware · 2 · 1 first-author
YearPublicationVenuePosition
2025 Proof Semantics of Railway Interlocking
Linas Laibinis, Alexei Iliasov, Alexander B. Romanovsky
ABZ2
2024 Safety Invariant Engineering for Interlocking Verification
Alexei Iliasov, Dominic Taylor, Linas Laibinis, Alexander B. Romanovsky
SAFECOMP1
2023 A Refinement-based Formal Development of Cyber-physical Railway Signalling Systems
abstract
For years, formal methods have been successfully applied in the railway domain to formally demonstrate safety of railway systems. Despite that, little has been done in the field of formal methods to address the cyber-physical nature of modern railway signalling systems. In this article, we present an approach for a formal development of cyber-physical railway signalling systems that is based on a refinement-based modelling and proof-based verification. Our approach utilises the Event-B formal specification language together with a hybrid system and communication modelling patterns to developing a generic hybrid railway signalling system model that can be further refined to capture a specific railway signalling system. The main technical contribution of this article is the refinement of the hybrid train Event-B model with other railway signalling sub-systems. The complete model of the cyber-physical railway signalling system was formally proved to ensure a safe rolling stock separation and prevent their derailment. Furthermore, the article demonstrates the advantage of the refinement-based development approach of cyber-physical systems, which enables a problem decomposition and in turn reduction in the verification and modelling effort.
Yamine Aït-Ameur, Sergiy Bogomolov, Guillaume Dupont, Alexei Iliasov, Alexander B. Romanovsky, Paulius Stankaitis
Formal Aspects Comput.4
2023 Practical Verification of Railway Signalling Programs
abstract
SafeCap is a modern toolkit for modelling, simulation and formal verification of railway networks. This paper discusses the use of SafeCap for formal analysis and automated scalable safety verification of solid state interlocking (SSI) programs – a technology at the heart of many railway signalling solutions around the world. The main driving force behind SafeCap development was to make it easy for signalling engineers to use the technology and thus to ensure its smooth industrial deployment. The unique qualities and the novelty of SafeCap are in making the use of formal notations and proofs fully transparent for the engineers. In this paper we explain the formal foundations of the proposed method, its tool support, and its successful application by railway companies in developing industrial signalling projects.
Alexei Iliasov, Dominic Taylor, Linas Laibinis, Alexander B. Romanovsky
IEEE Trans. Dependable Secur. Comput.1
2021 A refinement-based development of a distributed signalling system
abstract
Abstract The decentralised railway signalling systems have a potential to increase capacity, availability and reduce maintenance costs of railway networks. However, given the safety-critical nature of railway signalling and the complexity of novel distributed signalling solutions, their safety should be guaranteed by using thorough system validation methods. To achieve such a high-level of safety assurance of these complex signalling systems, scenario-based testing methods are far from being sufficient despite that they are still widely used in the industry. Formal verification is an alternative approach which provides a rigorous approach to verifying complex systems and has been successfully used in the railway domain. Despite the successes, little work has been done in applying formal methods for distributed railway systems. In our research we are working towards a multifaceted formal development methodology of complex railway signalling systems. The methodology is based on the Event-B modelling language which provides an expressive modelling language, a stepwise development and a proof-based model verification. In this paper, we present the application of the methodology for the development and verification of a distributed protocol for reservation of railway sections. The main challenge of this work is developing a distributed protocol which ensures safety and liveness of the distributed railway system when message delays are allowed in the model.
Paulius Stankaitis, Alexei Iliasov, Tsutomu Kobayashi, Yamine Aït-Ameur, Fuyuki Ishikawa, Alexander B. Romanovsky
Formal Aspects Comput.2
2021 Mutation Testing for Rule-Based Verification of Railway Signaling Data
abstract
Industry applications of formal verification to signaling control tables require formulation of a large number of mathematical conjectures expressing verification rules. It is paramount to establish the validity and completeness of these conjectures. This article discusses a mutation-based validation technique that guides domain experts in the construction of such verification rules. Furthermore, we use genetic programming to quickly generate millions of well-formed data mutations of control tables and to synthesize mutation programs. The technique is illustrated by a synthetic running example and a discussion of our experience in using it in the industrial setting.
Linas Laibinis, Alexei Iliasov, Alexander B. Romanovsky
IEEE Trans. Reliab.2
2019 Modelling Hybrid Train Speed Controller using Proof and Refinement
abstract
The modern radio-based railway signalling systems aim to increase network's capacity by enabling trains to run closer to each other. At the core of such systems is train's on-board computer (discrete) responsible for computing and controlling the speed (continuous) of the train. Such systems are best captured by hybrid models, which capture discrete and continuous system's aspects. Hybrid models are notoriously difficult to model and verify, in our research we address this problem by applying hybrid systems' modelling patterns and stepwise refinement for developing hybrid train speed controller model.
Paulius Stankaitis, Guillaume Dupont, Neeraj Kumar Singh 0001, Yamine Aït-Ameur, Alexei Iliasov, Alexander B. Romanovsky
ICECCS5
2018 Formal Verification of Signalling Programs with SafeCap
Alexei Iliasov, Dominic Taylor, Linas Laibinis, Alexander B. Romanovsky
SAFECOMP1
2016 Selective abstraction and stochastic methods for scalable power modelling of heterogeneous systems
abstract
With the increase of system complexity in both platforms and applications, power modelling of heterogeneous systems is facing grand challenges from the model scalability issue. To address these challenges, this paper studies two systematic methods: selective abstraction and stochastic techniques. The concept of selective abstraction via black-boxing is realised using hierarchical modelling and cross-layer cuts, respecting the concepts of boxability and error contamination. The stochastic aspect is formally underpinned by Stochastic Activity Networks (SANs). The proposed method is validated with experimental results from Odroid XU3 heterogeneous 8-core platform and is demonstrated to maintain high accuracy while improving scalability.
Ashur Rafiev, Fei Xia 0001, Alexei Iliasov, Rem Gensh, Ali Aalsaud, Alexander B. Romanovsky, Alexandre Yakovlev
FDL3
2016 Proving Event-B Models with Reusable Generic Lemmas
Alexei Iliasov, Paulius Stankaitis, Alexander B. Romanovsky
ICFEM1
2015 A reactive architecture for cloud-based system engineering
abstract
The paper introduces an architecture to support system engineering on the cloud. It employs the main benefits of the cloud: scalability, parallelism, cost-effectiveness, multi-user access and flexibility. The architecture includes an open toolbox which provides tools as a service to support various phases of system engineering. The architecture uses the Open Services for Life-cycle Collaboration (OSLC) technology to create a reactive middleware that informs all stakeholders about any changes in the development artefacts. It facilitates the interoperability of tools and enables the workflow of tools to support complex engineering steps. Another component of the architecture is a shared repository of artefacts. All the artefacts generated during a system engineering process are stored in the repository, and can be accessed by relevant stakeholders. The shared repository also serves as a platform to support a protocol for formal model decomposition and group work on the decomposed models. Finally, the architecture includes components for ensuring the dependability of the system engineering process.
David Adjepon-Yamoah, Alexander B. Romanovsky, Alexei Iliasov
ICSSP3
2015 A Formal Specification and Prototyping Language for Multi-core System Management
abstract
We relate the experience of a defining a formal domain specific language (DSL) for the construction and reasoning about OS-level management logic of multi-core systems. The approach is based on a novel, iterative development principle where results of prototyping studies feed back into the next language revision. We illustrate the DSL with several examples of executable scripts.
Alexei Iliasov, Ashur Rafiev, Fei Xia 0001, Rem Gensh, Alexander B. Romanovsky, Alexandre Yakovlev
PDP1
2015 From Requirements Engineering to Safety Assurance: Refinement Approach
Linas Laibinis, Elena Troubitsyna, Yuliya Prokhorova, Alexei Iliasov, Alexander B. Romanovsky
SETTA4
2014 Design of safety critical systems by refinement
abstract
An increasingly large number of safety-critical embedded systems rely on software to prevent and mitigate hazards occurring due to design errors and unexpected interactions of the system with its users and the environment. Implementing a safety instrumented function in the way advocated by the traditional software methods requires an intimate understanding and thorough validation of a complex ecosystem of programming languages, compilers, operating systems and hardware. We propose to consider an alternative where a system designer, for each individual problem, creates in a correct-by-construction manner both the design of a system and its compilation and execution infrastructure. This permits an uninterrupted chain of a formal correctness argument spanning from formalised requirements all the way to the gate-level characterisation of an execution environment. The past decade of advances in verification technology turned the mechanical verification of large-scale models into a reality while the pressure of certification makes the cost of a formally verified development routine increasingly acceptable. The proposal fits the Grand Challenge for Computer Research posed by Hoare in 2003, namely, development of a Verifying Compiler which not only mechanically translates a given program from one language to another but also verifies its correctness according to a formal specification. This allows meeting the most stringent software certification requirements such as SIL 4. We illustrate the vision with a small case-study developed using the Event-B modelling notation and tools.
Alexei Iliasov, Arseniy Alekseyev, Danil Sokolov, Andrey Mokhov
DATE1
2014 Synthesis of Processor Instruction Sets from High-Level ISA Specifications
abstract
As processors continue to get exponentially cheaper for end users following Moore’s law, the costs involved in their design keep growing, also at an exponential rate. The reason is ever increasing complexity of processors, which modern EDA tools struggle to keep up with. This paper focuses on the design of Instruction Set Architecture (ISA), a significant part of the whole processor design flow. Optimal design of an instruction set for a particular combination of available hardware resources and software requirements is crucial for building processors with high performance and energy efficiency, and is a challenging task involving a lot of heuristics and high-level design decisions. This paper presents a new compositional approach to formal specification and synthesis of ISAs. The approach is based on a new formalism, called Conditional Partial Order Graphs, capable of capturing common behavioural patterns shared by processor instructions, and therefore providing a very compact and efficient way to represent and manipulate ISAs. The Event-B modelling framework is used as a formal specification and verification back-end to guarantee correctness of ISA specifications. We demonstrate benefits of the presented methodology on several examples, including Intel 8051 microcontroller.
Andrey Mokhov, Alexei Iliasov, Danil Sokolov, Maxim Rykunov, Alexandre Yakovlev, Alexander B. Romanovsky
IEEE Trans. Computers2
2013 The SafeCap Platform for Modelling Railway Safety and Capacity
Alexei Iliasov, Ilya Lopatkin, Alexander B. Romanovsky
SAFECOMP1
2013 Developing mode-rich satellite software by refinement in Event-B
Alexei Iliasov, Elena Troubitsyna, Linas Laibinis, Alexander B. Romanovsky, Kimmo Varpaaniemi, Dubravka Ilic, Timo Latvala
Sci. Comput. Program.1
2011 Formal Derivation of a Distributed Program in Event B
Alexei Iliasov, Linas Laibinis, Elena Troubitsyna, Alexander B. Romanovsky
ICFEM1
2011 Rigorous Development of Dependable Systems Using Fault Tolerance Views
abstract
This paper introduces the Mode and Fault Tolerance Views approach to stepwise rigorous development of critical systems. It supports systematic, structured and recursive modelling of system fault tolerance, including error detection, error recovery and degraded modes. Built on our previous work extending the Event-B method with reasoning about fault tolerance, the paper focuses on a practical application and evaluation of the approach. The proposed modelling approach is backed by an integrated toolset. The paper is illustrated with a case study from the aerospace domain.
Ilya Lopatkin, Alexei Iliasov, Alexander B. Romanovsky
ISSRE2
2010 Developing Mode-Rich Satellite Software by Refinement in Event B
Alexei Iliasov, Elena Troubitsyna, Linas Laibinis, Alexander B. Romanovsky, Kimmo Varpaaniemi, Dubravka Ilic, Timo Latvala
FMICS1
2010 Verifying Mode Consistency for On-Board Satellite Software
Alexei Iliasov, Elena Troubitsyna, Linas Laibinis, Alexander B. Romanovsky, Kimmo Varpaaniemi, Pauli Väisänen, Dubravka Ilic, Timo Latvala
SAFECOMP1
2009 Modal Systems: Specification, Refinement and Realisation
Fernando Luís Dotti, Alexei Iliasov, Leila Ribeiro 0001, Alexander B. Romanovsky
ICFEM2
2007 A Framework for Open Distributed System Design
abstract
Building open distributed systems is an even more challenging task than building distributed systems, as their components are loosely synchronised, can move, become disconnected, and their behaviour may depend on the changing context. The approach we are putting forward relies on using a combination of formal methods applied for rigorous development of the critical parts of the system and a set of design abstractions proposed specifically for the open context-aware applications and supported by a special middleware. Our middleware provides system structuring through the concepts of roles, agents, locations and scopes, making it easier for application developers to achieve fault tolerance. We demonstrate our approach using a case study, in which we show the whole process of developing an ambient campus application - an example of open distributed systems - including its formal specification, refinement, and implementation.
Alexei Iliasov, Alexander B. Romanovsky, Budi Arief
COMPSAC (2)1
2007 On Rigorous Design and Implementation of Fault Tolerant Ambient Systems
abstract
Developing fault tolerant ambient systems requires many challenging factors to be considered due to the nature of such systems, which tend to contain a lot of mobile elements that change their behavior depending on the surrounding environment, as well as the possibility of their disconnection and reconnection. It is therefore necessary to construct the critical parts of fault tolerant ambient systems in a rigorous manner. This can be achieved by deploying formal approach at the design stage, coupled with sound framework and support at the implementation stage. In this paper, we briefly describe a middleware that we developed to provide system structuring through the concepts of roles, agents, locations and scopes, making it easier for the developers to achieve fault tolerance. We then outline our experience in developing an ambient lecture system using the combination of formal approach and our middleware
Alexei Iliasov, Alexander B. Romanovsky, Budi Arief, Linas Laibinis, Elena Troubitsyna
ISORC1
2005 Exception Handling in Coordination-Based Mobile Environments
abstract
Mobile agent systems have many attractive features including asynchrony, openness, dynamicity and anonymity, which makes them indispensable in designing complex modern applications that involve moving devices, human participants and software. To be comprehensive this list should include fault tolerance, yet as our analysis shows, this property is, unfortunately, often overlooked by middleware designers. A few existing solutions for fault tolerant mobile agents are developed mainly for tolerating hardware faults without providing any general support for application-specific recovery. In this paper we describe a novel exception handling model that allows application-specific recovery in coordination-based systems consisting of mobile agents. The proposed mechanism is general enough to be used in both loosely-and tightly-coupled communication models. The general ideas behind the mechanism are applied in the context of the Lime middleware.
Alexei Iliasov, Alexander B. Romanovsky
COMPSAC (1)1