A circuit simulation model is presented suitable for the design of analogue and digital SOS MOSFET integrated circuits. Both the drift and diffusion components of channel current are modeled, which are computed from the surface potentials at the drain and source ends of the channel. The surface potential function varies continuously from subthreshold to strong inversion allowing a smooth transition of device conductances and capacitances at the threshold voltage. Charge is conserved in the model formulation yielding reliable simulation results in transient analysis. The model has been implemented in the SPICE program, together with important extrinsic elements such as impact ionization current, pn-junction current and capacitances, and substrate resistance. The pn-junction current expression includes a physical formulation for the drain leakage current. The influence of temperature on device characteristics is included, making the model valid from /spl minus/55 to 125/spl deg/C. Simulation results are compared with measured dc device characteristics showing considerable improvement over bulk MOS models in predicting the drain conductance. In subthreshold, the model predicts the observed increase in inverse subthreshold slope with drain bias for n-channel devices. Transient simulations show that capacitive coupling from drain, gate and source nodes can strongly influence the floating substrate potential. The model has been successfully applied to the design of analogue SOS circuits.>