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Christoph A. Schaefer

dblp:11/7413 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2010
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Requirements engineering and software design · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 50% Processor architecture and microarchitecture · 50%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Requirements engineering and software design › software architecture › architecture description
architecture description language
0.112010
Engineering parallel applications with tunable architectures · ICSE (1) 2010
Requirements engineering and software design
software architecture
0.112010
Engineering parallel applications with tunable architectures · ICSE (1) 2010
Processor architecture and microarchitecture
adaptive architecture
0.112010
Engineering parallel applications with tunable architectures · ICSE (1) 2010
Parallel and multicore computing
parallel programming models
0.112010
Engineering parallel applications with tunable architectures · ICSE (1) 2010

Methods — techniques the papers use, named apart from their topics

parallel patterns · 0.2auto-tuning · 0.2
YearPublicationVenuePosition
2010 A Language-Based Tuning Mechanism for Task and Pipeline Parallelism
Frank Otto, Christoph A. Schaefer, Matthias Dempe, Walter F. Tichy
Euro-Par (2)2
2010 Engineering parallel applications with tunable architectures
abstract
Current multicore computers differ in many hardware characteristics. Software developers thus hand-tune their parallel programs for a specific platform to achieve the best performance; this is tedious and leads to non-portable code. Although the software architecture also requires adaptation to achieve best performance, it is rarely modified because of the additional implementation effort. The Tunable Architectures approach proposed in this paper automates the architecture adaptation of parallel programs and uses an auto-tuner to find the best-performing software architecture for a particular machine. We introduce a new architecture description language based on parallel patterns and a framework to express architecture variants in a generic way. Several case studies demonstrate significant performance improvements due to architecture tuning and show the applicability of our approach to industrial applications. Software developers are exposed to less parallel programming complexity, thus making the approach attractive for experts as well as inexperienced parallel programmers.
Christoph A. Schaefer, Victor Pankratius, Walter F. Tichy
ICSE (1)1
2009 Atune-IL: An Instrumentation Language for Auto-tuning Parallel Applications
Christoph A. Schaefer, Victor Pankratius, Walter F. Tichy
Euro-Par1