The compute-intensive nature of SPICE simulations hinders effective analog design automation. This paper introduces INSIGHT, a data-efficient, adaptive, high-fidelity, technologyagnostic universal neural simulator framework that formulates analog performance prediction as an autoregressive sequence generation task to accurately predict performance across diverse circuits. INSIGHT achieves test $\mathbf{R}^{\mathbf{2}}$ scores $\geq \mathbf{0. 9 5}$, outperforming existing neural surrogates. Cross-technology transfer learning experiments show that INSIGHT can preserve model performance with $\sim \mathbf{6 0 \%}$ less training data. Low-Rank Adaptation (LoRA) integration further reduces memory footprint by $\sim 42 \%$ and training time by $\sim 25 \%$, maintaining high performance. Our experiments show that INSIGHT-based RL sizing framework achieves $100-1000 \times$ lower simulation costs over existing sizing methods for identical benchmarks and target specifications.

We argue that the negative transfer problem occurring when the new task to learn arrives is an important problem that needs not be overlooked when developing effective Continual Reinforcement Learning (CRL) algorithms. Through comprehensive experimental validation, we demonstrate that such issue frequently exists in CRL and cannot be effectively addressed by several recent work on either mitigating plasticity loss of RL agents or enhancing the positive transfer in CRL scenario. To that end, we develop Reset & Distill (R&D), a simple yet highly effective baseline method, to overcome the negative transfer problem in CRL. R&D combines a strategy of resetting the agent's online actor and critic networks to learn a new task and an offline learning step for distilling the knowledge from the online actor and previous expert's action probabilities. We carried out extensive experiments on long sequence of Meta World tasks and show that our simple baseline method consistently outperforms recent approaches, achieving significantly higher success rates across a range of tasks. Our findings highlight the importance of considering negative transfer in CRL and emphasize the need for robust strategies like R&D to mitigate its detrimental effects.

Graph Transformers (GTs) have emerged as a powerful alternative to message-passing neural networks, yet their performance heavily depends on effectively embedding structural inductive biases. In this work, we introduce novel structural encodings (SEs) grounded in a rigorous analysis of random walks (RWs), leveraging Green and Martin kernels that we have carefully redefined for AI applications while preserving their mathematical essence.These kernels capture the long-term behavior of RWs on graphs and allow for enhanced representation of complex topologies, including non-aperiodic and directed acyclic substructures.Empirical evaluations across eight benchmark datasets demonstrate strong performance across diverse tasks, notably in molecular and circuit domains.We attribute this performance boost to the improved ability of our kernel-based SEs to encode intricate structural information, thereby strengthening the global attention and inductive bias within GTs.This work highlights the effectiveness of theoretically grounded kernel methods in advancing Transformer-based models for graph learning.

Signal integrity becomes more critical to modern digital systems such as solid-state drives due to their high-speed operation. However, one of the challenges in signal integrity analysis is S-parameter modeling process for printed circuit boards (PCB). Due to increasing PCB design complexity, existing numerical methods take too long to solve governing equations for S-parameters. To overcome the issue, we present a novel deep learning framework, TraceFormer, to predict S-parameters of PCB traces. Our framework constructs a graph from PCB traces and tokenizes trace segments with geometric and topological information. A transformer encoder produces PCB representations from the tokens, followed by extraction networks which predict four different types of complex-valued S-parameters together. TraceFormer achieved above 0.99 R-squared score up to 15GHz for 4-port PCB designs, resulting in less than 3.1% and 4.2% errors in terms of the eye diagram's width and height, respectively.

Automation of analog circuit design is highly desirable, yet challenging. Various approaches such as deep reinforcement learning (DRL), genetic algorithms, and Bayesian optimization have been proposed and found to be effective. However, these techniques require a large number of interactions with a real simulator, leading to high computational costs. Therefore, we present a novel DRL method, CRONuS, for automatic analog circuit design that uses a surrogate for the simulator. With the help of the surrogate, our method is capable of augmenting a data set with a conservative reward design for stable policy training, without having to interact with the simulator. Regardless of the type of analog circuit, our experiment demonstrated a more than 5 × improvement in sample efficiency with varying target performance metrics.

Well-designed test cases (TCs) are crucial for en-suring the quality of Solid-State Drive (SSD) products. Indeed, validating SSD firmware code by the TCs is indispensable to check if there are no defects during the SSD development process. Accordingly, it is necessary to create short TCs covering firmware code as much as possible for efficient and precise validation. While various methods are available for generating TCs, existing automated approaches overlook backward compatibility, a key property in the SSD development process. To utilize the property, we introduce a novel deep-learning approach called GRAFT, which combines graph representation learning and reinforcement learning (RL) for automated TC generation in SSDs by leveraging pre-collected data. G RAFT trains a graph neural network to extract the underlying structure of the SSD firmware code from a given SSD simulator. The resulting graph embeddings serve as observations in the RL process. To address the challenge of over- estimation in an external domain in the RL process, conservative Q-Iearning, an offline RL technique, is employed using the pre- collected data. Despite the limitation of not being able to interact with the SSD simulator for training, we demonstrate that GRAFT successfully trains RL agents that generate TCs. The TCs are not only significantly more efficient with 3.5x shorter than randomly generated TCs by a black-box fuzzer but also exhibit comparable coverage and efficiency to those created by human experts with domain knowledge, which fully took three days. Moreover, the TCs achieves maximum coverage more reliably than any other methods in the experiments.