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Kavitha Chandrasekar

dblp:115/9117 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2017
0000-0003-4826-4286ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 67% Electronic design automation · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › load balancing
dynamic load balancing
0.312017
POSTER: Automated Load Balancer Selection Based on Application Characteristics · PPoPP 2017
Parallel and multicore computing
load balancing
0.312017
POSTER: Automated Load Balancer Selection Based on Application Characteristics · PPoPP 2017
Electronic design automation › high-level synthesis
scheduling
0.312017
POSTER: Automated Load Balancer Selection Based on Application Characteristics · PPoPP 2017

Methods — techniques the papers use, named apart from their topics

randomized decision forests · 0.3machine learning · 0.3
YearPublicationVenuePosition
2017 Runtime Techniques for Programming with Fast and Slow Memory
abstract
The increase in memory capacity is substantially behind the increase in computing power in today's supercomputers. In order to alleviate the effect of this gap, diverse options such as NVM - non-volatile memory (less expensive but slow) and HBM - high bandwidth memory (fast but expensive) are being explored. In this paper, we present a common approach using parallel runtime techniques for utilizing NVM and HBM as extensions of the existing memory hierarchy. We evaluate our approach using matrix-matrix multiplication kernel implemented in CHARM++ and show that applications with memory requirement four times the HBM/DRAM capacity can be executed efficiently using significantly less total resources.
Xiang Ni, Kavitha Chandrasekar, Laxmikant V. Kalé
CLUSTER3
2017 POSTER: Automated Load Balancer Selection Based on Application Characteristics
abstract
Many HPC applications require dynamic load balancing to achieve high performance and system utilization. Different applications have different characteristics and hence require different load balancing strategies. Invocation of a suboptimal load balancing strategy can lead to inefficient execution. We propose Meta-Balancer, a framework to automatically decide the best load balancing strategy. It employs randomized decision forests, a machine learning method, to learn a model for choosing the best load balancing strategy for an application represented by a set of features that capture the application characteristics.
Harshitha Menon, Kavitha Chandrasekar, Laxmikant V. Kalé
PPoPP2