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Feiqiao Yu

dblp:115/9606 · DBLP profile ↗
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2ranked-venue papers
0as first author
1since 2021 · last 2023
0000-0003-3416-3046ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%
Interdisciplinary, comprehensive, and emerging computing
1 paper
Computational science and engineering · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
fault modeling
0.212014
Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2014
Electronic design automation
hardware verification and test
0.212014
Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2014
Electronic design automation › hardware verification and test
test generation
0.212014
Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2014
Computational science and engineering
microfluidic device
0.112014
Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2014

Methods — techniques the papers use, named apart from their topics

boolean logic modeling · 0.4automatic test pattern generation · 0.4
YearPublicationVenuePosition
2023 On The Limitation of mmWave Beamforming Using Phase-Instability Array
abstract
The millimeter wave (mmWave) technology is poised to play a significant role in the upcoming generation of wireless communication and high-precision sensing systems. However, mmWave technology exhibits higher path loss compared to low-frequency alternatives, necessitating the development of beamforming methods with large array sizes to enhance array gain. Existing approaches assume that the signal phases corresponding to different incident angles are identical. Unfortunately, this assumption does not hold in practical mmWave applications. This paper addresses the issue of phase instability in mmWave arrays and formulates a system model to characterize arrays affected by phase instability (PIA) by incorporating the random characteristics of received signals associated with various incident angles. Subsequently, a performance loss caused by phase instability is quantified by defining a ratio between the beamforming gain of a perfect array and that of a PIA. The paper further derives a theoretical distribution to describe the gain loss in mmWave scenarios utilizing PIA. Finally, simulation results are presented to demonstrate the gain loss in PIA, and the theoretical findings align well with the simulations.
Peng Chen 0018, Feiqiao Yu, Mengjiang Sun, Tao Luo 0018, Yangying Zhao, Zhimin Chen 0001
VTC Fall2
2014 Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration
abstract
Recent advances in flow-based microfluidics have led to the emergence of biochemistry-on-a-chip as a new paradigm in clinical diagnostics and biomolecular recognition. However, a potential roadblock in the deployment of microfluidic biochips is the lack of test techniques to screen defective devices before they are used for biochemical analysis. Defective chips lead to repetition of experiments, which is undesirable due to high reagent cost and limited availability of samples. Prior work on fault detection in biochips has been limited to digital (“droplet”) microfluidics and other electrode-based technology platforms. The paper proposes the first approach for automated testing of flow-based microfluidic biochips that are designed using membrane-based valves for flow control. The proposed test technique is based on a behavioral abstraction of physical defects in microchannels and valves. The flow paths and flow control in the microfluidic device are modeled as a logic circuit composed of Boolean gates, which allows test generation to be carried out using standard automatic test pattern generation tools. The tests derived using the logic circuit model are then mapped to fluidic operations involving pumps and pressure sensors in the biochip. Feedback from pressure sensors can be compared to expected responses based on the logic circuit model, whereby the types and positions of defects are identified. We show how a fabricated biochip can be tested using the proposed method, and demonstrate experimental results for two additional fabricated chips.
Kai Hu 0003, Feiqiao Yu, Tsung-Yi Ho, Krishnendu Chakrabarty
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2